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R29 Datasheet(PDF) 138 Page - Renesas Technology Corp |
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R29 Datasheet(HTML) 138 Page - Renesas Technology Corp |
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138 / 473 page ![]() R8C/28 Group, R8C/29 Group 12. Interrupts Rev.2.10 Sep 26, 2008 Page 119 of 441 REJ09B0279-0210 12.2.2 INTi Input Filter (i = 0, 1, 3) The INTi input contains a digital filter. The sampling clock is selected by bits INTiF1 to INTiF0 in the INTF register. The INTi level is sampled every sampling clock cycle and if the sampled input level matches three times, the IR bit in the INTiIC register is set to 1 (interrupt requested). Figure 12.14 shows the Configuration of INTi Input Filter. Figure 12.15 shows an Operating Example of INTi Input Filter. Figure 12.14 Configuration of INTi Input Filter Figure 12.15 Operating Example of INTi Input Filter INTiF0, INTiF1: Bits in INTF register INTiEN, INTiPL: Bits in INTEN register i = 0, 1, 3 = 01b INTi Port direction register(1) Sampling clock Digital filter (input level matches 3x) INTi interrupt = 10b = 11b f32 f8 f1 INTiF1 to INTiF0 INTiEN Other than INTiF1 to INTiF0 = 00b = 00b INTiPL = 0 INTiPL = 1 NOTE: 1. INT0: Port P4_5 direction register INT1: Port P1_5 direction register when using the P1_5 pin Port P1_7 direction register when using the P1_7 pin INT3: Port P3_3 direction register Both edges detection circuit INTi input Sampling timing IR bit in INTiIC register Set to 0 in program This is an operation example when bits INTiF1 to INTiF0 in the INTiF register are set to 01b, 10b, or 11b (digital filter enabled). i = 0, 1, 3 |
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