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the buck high-side and full-bridge high and low-side output drivers are activated. The low

voltage power supply is realized with buck converter circuit utilizing the Link Switch

LNK302D (Figure 4.1). Once the voltage on VCC reaches the start-up threshold

(UVLO+), voltage on VSENSE pin is above VOV threshold and the voltage on RST pin is

less than 1.5V, the IC turns on and the full-bridge oscillator (CT) and gate driver outputs

(HO1, LO1, HO2 and LO2) begin to oscillate. During UVLO mode, the full-bridge and

buck are off, the ignition timer and clock are off, the fault and good counters are reset,

and the fault latch is reset.

5.3 Ignition Mode

The ignition timer is enabled when the IC first enters IGN Mode. The ignition timer

frequency is programmed with the external capacitor at the TIGN pin. CTIGN charges up

and down linearly through internal sink and source currents between a fixed voltage

window of 2V and 4V (Figure 5.3). This sets up an internal clock (666ms typical) that is

divided out 128 times and then used to turn the ignition gate driver output (IGN pin) on

and off for a given on and off-time (21sec ‘high’/64sec ‘low’ typical). A logic ‘high’ at the

IGN pin will turn the external ignition MOSFET (MIGN) on and enable the external sidac-

controlled pulse ignition circuit.

TIGN

IGN

VLAMP

4V

2V

0V

IGN ENABLED

(21 s typ.)

IGN DISABLED

666ms

typ.

(64 s typ.)

IGN ENABLED

(21 s typ.)

FAULT

MODE

787sec typ.

Figure 5.3: Ignition Timer Timing Diagram

During the ignition phase, the lamp is an open circuit and the buck output voltage is

limited to a maximum value. The ignition circuit comprises of a diac (DIGN), transformer

1180sec typ.