ISL6366 datasheet(32/44 Pages) INTERSIL

32 / 44 page

ISL6366

FN6964.0

January 3, 2011

6. Run the actual board under full load again with the proper

resistors connected to the “TCOMP” pin.

7. Record the output voltage as V1 immediately after the output

voltage is stable with the full load. Record the output voltage

as V2 after the VR reaches the thermal steady state.

8. If the output voltage increases over 2mV as the temperature

increases, i.e. V2 - V1 > 2mV, reduce “TCOMP” value; if the

output voltage decreases over 2mV as the temperature

increases, i.e. V1 - V2 > 2mV, increase “TCOMP” values.

External Temperature Compensation

When the “OFF” code of TCOMP is selected, then the internal

current source is not thermally compensated, i.e, the integrated

temperature compensation function is disabled. However, one

external temperature compensation network, shown in

Figure 24, can be used to cancel the temperature impact on the

droop (i.e., load line).

The sensed current will flow out of the FB pin and develop a droop

voltage across the resistor equivalent (RFB) between the FB pin

and VOUT sensing node. If RFB resistance reduces as the

temperature increases, the temperature impact on the droop can

be compensated. An NTC resistor can be placed close to the power

stage and used to form RFB. Due to the nonlinear temperature

characteristics of the NTC, a resistor network is needed to make

the equivalent resistance between the FB pin and VOUT sensing

node inversely proportional to the temperature.

This external temperature compensation network can only

compensate the temperature impact on the droop, while it has no

impact to the sensed current inside ISL6366. Therefore, this

network cannot compensate for the temperature impact on the

overcurrent protection function. In addition, NTC could pick up

phase switching noise and easily inject into the loop. This method

is typically not recommended.

Furthermore, the NTC can be placed with L/DCR matching

network to thermally compensate the sensed current, or with

IMON network to thermally compensate the IMON voltage

(typically need to set internal overcurrent trip higher than IMON

OCP trip), as shown in Figures 25 and 26, respectively. These

methods are typically applicable to both VR0 and VR1 for

non-droop applications.

Hard-wired Registers (Patent

Pending)

To set registers for VR12/IMVP7 applications using lowest pin-

count package and with lowest overall cost, Intersil has

developed a high resolution ADC using a patented technique with

simple 1%, 100ppm/k or better temperature coefficient resistor

divider, as shown in Figure 27. The same type of resistors are

preferred so that it has similar change over temperature. In

addition, the divider is comparing to the internal divider off VCC

and GND nodes and therefore must refer to VCC and GND pins,

not through any RC decoupling network.

FIGURE 24. EXTERNAL TEMPERATURE COMPENSATION FOR

LOAD LINE

VO U T

ID R O O P

CO M P

ISL6366

FIGURE 25. NTC WITH L/DCR MATCHING NETWORK FOR

THERMAL COMPESNATION

ISENS-

PHASE

ISENS+

ISL6366

FIGURE 26. NTC WITH IMON NETWORK FOR THERMAL

COMPESNATION

IMON

ISL6366

FIGURE 27. SIMPLIFIED RESISTOR DIVIDER ADC

EXTERNAL CIRCUIT

ISL6366

RUP

RDW

VCC

ADC

TABLE

ISL6366 Datasheet(PDF) 32 Page - Intersil Corporation

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