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IC-VRV Datasheet(PDF) 2 Page - IC-Haus GmbH

Part # IC-VRV
Description  BIDIRECTIONAL 關P INTERFACE TO 24V
PDF  12 Pages
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Manufacturer  ICHAUS [IC-Haus GmbH]
Direct Link  http://www.ichaus.biz
Logo ICHAUS - IC-Haus GmbH

IC-VRV Datasheet(HTML) 2 Page - IC-Haus GmbH

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iC-VRV
BIDIRECTIONAL µP INTERFACE TO 24V
Rev A2, Page 2/12
DESCRIPTION
iC-VRV is an 8-fold low-side driver with integrated control logic which is divided internally into two mutually
independent blocks (nibbles).
In the input mode, ports IO0 to IO7 can be used to record logical levels. In this process, a programmable
pull-down current (200 µA or 2 mA) sets a defined level and functions as the biasing current for switching
contacts. The stages programmed as outputs can drive any desired loads (e. g. lamps, long cables, relays)
at a continuous current of 100 mA or 500 mA in pulse operation. The free-wheeling currents created upon
each stage turn-off are discharged through the integrated free-wheeling diodes to a voltage applied externally
to the COM pin; a circuit with a Zener diode is also possible.
In the event of a short circuit, a protective circuit breaker ensures that the output stage affected does not just
simply switch off but is instead clocked as a function of the load. As a result, the current assumes a low
average value. The output stage is ready for operation immediately just as soon as the cause of the short
circuit has been eliminated.
The shutdown at overtemperature protects the IC against thermal destruction by causing the output stages
to turn off and the pull-down currents to be reduced from 2 mA to 200 µA. This shutdown is also triggered in
case of undervoltage at VCC.
Due to the microprocessor interface the iC-VRV can be operated directly on a bus system. The interface
consists of the data bits D0 to D7 and the associated control signals A0, A1, CSN, WRN and RDN. The signal
CLK clocks the implemented digital input filter and BLFQ clocks the programmed flashing function. In the
event of a signal change of the I/O pins programmed as inputs, an interrupt signal can be generated at output
INTN.
Activating the input RESN resets the initial condition.
Chip programming is conducted via four addresses at A0 and A1. During this programming, presettings for
flashing frequencies, filtering times, interrupt control, pull-down currents and input/output mode, etc. are stored
in two registers (CONTROL WORD1+2).
All inputs and outputs are protected with diodes against destruction due to ESD.



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