LB1825 datasheet(2/9 Pages) SANYO

2 / 9 page

Allowable Operating Ranges at Ta = 25°C

Electrical Characteristics at Ta = 25°C, VCC = 24 V

No. 4845-2/9

LB1825

Parameter

Symbol

Conditions

Ratings

Unit

Supply voltage

VCC

10 to 28

Parameter

Symbol

Conditions

min

typ

max

Unit

ICC1

Braking stopped mode

Current drain

ICC2

FGOUT1 stopped mode

ICC3

External clock, braking stopped mode

Upper transistor (1)

VO (sat)1

IO = 1.0 A

1.0

1.6

Upper transistor (2)

VO (sat)2

IO = 1.5 A

1.25

2.1

Lower transistor (1)

VO (sat)1

IO = 1.0 A

0.6

1.0

Lower transistor (2)

VO (sat)2

IO = 1.5 A

0.9

1.6

Output leakage current

IO LEAK

100

µA

[Fixed voltage block]

Output voltage

VREG

IREG = 20 mA

6.3

7.0

7.8

Output current

IREG

Load variation

∆V

REG

IREG = 0 to 20 mA

0.25

Temperature coefficient

αV

REG

Design target value

–2.0

mV/°C

[Hall input block]

Input bias current

IB (HA)

µA

Common-mode input range

1.5

VCC – 1.8

Input sensitivity

DVH

Input offset voltage

VIOH

[Drive block]

Dead zone width

VDZ

200

Output idling voltage

VID

Forward gain

GDF+

0.4

0.5

0.6

Reverse gain

GDF–

–0.6

–0.5

–0.4

Accelerate command voltage

VSTA

6.0

6.3

Decelerate command voltage

VSTO

0.8

1.5

Forward limiter voltage

VL+

Rf = 1.8 Ω

0.45

0.53

0.61

Reverse limiter voltage

VL–

Rf = 1.8 Ω

0.45

0.53

0.61

[Phase comparator block]

Output high level voltage

VPDH

No external load

VREG – 0.4

Output low level voltage

VPDL

No external load

0.4

Output source current

IPD+

0.4

Output sink current

IPD–

2.5

[Error amplifier block]

Input bias current

IB (ER)

µA

Input offset voltage

VIO (ER)

–10

+10

Output high level voltage

VERH

No external load

5.5

Output low level voltage

VERL

No external load

1.0

[Lock detector block]

Output saturation voltage

VLD (sat)

ILD = 10 mA

0.4

[FG amplifier block]

Input bias current

IB (FG)

µA

Input offset voltage

VIO (FG)

–10

+10

Output high level voltage

VFGH

No external load

5.0

Output low level voltage

VFGL

No external load

2.0

[FG Schmitt block]

Input operating level

VIS

FGOUT1 generation signal

160

mVp-p

Input hysteresis (high

→ low)

VSHL

External clock, braking stopped mode

Input hysteresis (low

→ high)

VSLH

External clock, braking stopped mode

Hysteresis

VFGS

Output saturation voltage

VFG2 (sat) IFG2 = 10 mA

0.4

Continued on next page.

Output

saturation

voltage

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