Pin Functions

No. 5280-5/9

LC4101C

Symbol

I/O

Function

OUT1 to

OUT240

DISP

DF

LOAD

L/R

EIO1

EIO2

O

I

I

I

I

–

–

I

I

I

I

I/O

I/O

LCD drive outputs

Note: * don’t care (0 or 1).

All pins with the same name must be set to the same potential.

Alternation input

CP

I

Data acquisition clock (falling edge)

Data load clock (falling edge)

BS

I

4-bit/8-bit switching signal; high: 8 bits, low: 4 bits

8

×30: Data latch (BS = high)

Note: The numbers 1 to 240 in the table indicate OUT output numbers.

Enable inputs and outputs

output of the preceding stage.

Enable outputs: When connecting multiple chips in cascade, connect the enable output to the enable input of the next stage.

DF

Data

DISP

OUTn

1

1

1

1

0

1

0

0

1

0

1

1

*

*

0

L/R

EIO1

EIO2

L

In

Out

H

Out

In

L/R

CP:

1

2

3

4

29

30

D7

1

9

17

25

• • •

225

233

D6

2

10

18

26

• • •

226

234

D5

3

11

19

27

• • •

227

235

L

D4

4

12

20

28

• • •

228

236

D3

5

13

21

29

• • •

229

237

D2

6

14

22

30

• • •

230

238

D1

7

15

23

31

• • •

231

239

D0

8

16

24

32

• • •

232

240

D7

240

232

224

216

• • •

16

8

D6

239

231

223

215

• • •

15

7

D5

238

230

222

214

• • •

14

6

H

D4

237

229

221

213

• • •

13

5

D3

236

228

220

212

• • •

12

4

D2

235

227

219

211

• • •

11

3

D1

234

226

218

210

• • •

10

2

D0

233

225

217

209

• • •

9

1

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