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LC5824 Datasheet(PDF) 21 Page - Sanyo Semicon Device

Part # LC5824
Description  4-Bit Single-Chip Microcontrollers Featuring 4 KB to 8 KB of ROM, 1 Kbit of RAM, and an LCD Driver for Medium Speed Small-Scale Control Applications
PDF  24 Pages
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Manufacturer  SANYO [Sanyo Semicon Device]
Direct Link  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC5824 Datasheet(HTML) 21 Page - Sanyo Semicon Device

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No. 5944-21/24
LC5824, LC5823, LC5822
Continued from preceding page.
Parameter
Symbol
Conditions and applicable pins
Ratings
Unit
min
typ
max
[1/3 Bias - 1/3 Duty and 1/3 Bias - 1/4 Duty Drive]
High-level output voltage
VOH5
VDD = 3.0 V, IOH = –0.4 µA, SEGOUT
VDD3 + 0.2
V
Middle-level output voltage
VOM1–5
VDD = 3.0 V, IOH = –0.4 µA, IOL = 0.4 µA, SEGOUT
VDD2 – 0.2
VDD2 + 0.2
V
VOM2–5
VDD = 3.0 V, IOH = –0.4 µA, IOL = 0.4 µA, SEGOUT
VDD1 – 0.2
VDD1 + 0.2
V
Low-level output voltage
VOL5
VDD = 3.0 V, IOL = 0.4 µA, SEGOUT
0.2
V
VDD = 3.0 V, IOH = –0.4 µA,
High-level output voltage
VOH6
COM1 to COM3 (in 1/3 duty mode)
VDD3 + 0.2
V
COM1 to COM4 (in 1/4 duty mode)
VDD = 3.0 V, IOH = –0.4 µA, IOL = 0.4 µA,
VOM1–6
COM1 to COM3 (in 1/3 duty mode)
VDD2 – 0.2
VDD2 + 0.2
V
COM1 to COM4 (in 1/4 duty mode)
Middle-level output voltage
VDD = 3.0 V, IOH = –0.4 µA, IOL = 0.4 µA,
VOM2–6
COM1 to COM3 (in 1/3 duty mode)
VDD1 – 0.2
VDD1 + 0.2
V
COM1 to COM4 (in 1/4 duty mode)
Low-level output voltage
VOL6
VDD = 3.0 V, IOL = 0.4 µA
0.2
V
[Output Voltage]
LCD drive method: 1/3 bias
(halver)
VDD1
VDD = 3.0 V, fopg = 32.768 kHz,
1.35
V
C1 to C4 = 0.1 µF, Figure 6
(tripler)
VDD3
VDD = 3.0 V, fopg = 32.768 kHz,
4.1
V
C1 to C4 = 0.1 µF, Figure 6
LCD drive method: 1/2 bias
(halver)
VDD1
VDD = 3.0 V, fopg 32.768 kHz, C1 = C2 = 0.1 µF, Figure 7
1.35
V
[Current Drain (With the backup flag cleared)]
LCD drive method: 1/3 bias
| IDD |
VDD = 3.0 V, Halt mode, C1 to C4 = 0.1 µF, CI = 25 kΩ
5.0
µA
Co = Cg = 20 pF, 32.768 kHz Xtal, Figure 6
LCD drive methods other than
| IDD |
VDD = 3.0 V, Halt mode, C1 to C2 = 0.1 µF, CI = 25 kΩ,
5.0
µA
1/3 bias
Figure 7, Co = Cg = 20 pF, 32.768 kHz, Xtal
Oscillator start voltage
Vstt
VDD = VDD2, CI = 25 kΩ, Figure 4,
2.2
V
Co = Cg = 20 pF, 32.768 kHz Xtal
Oscillator hold voltage
VHOLD
VDD = VDD2, CI = 25 kΩ, , Figures 5, 6, 7, and 8,
2.0
V
(with the backup flag cleared)
Co = Cg = 20 pF, 32.768 kHz Xtal
Oscillator start time
Tstt
VDD = VDD2 = 2.2 V, CI = 25 kΩ, Figure 4
10
sec
Co = Cg = 20 pF, 32.768 kHz Xtal
Oscillator correction capacitance
10P
XC
8
10
12
pF
20P
XTOUT
16
20
24
pF
Note : 1. S1 to 4, K1 to 4
2. M1 to 4, A1 to 4, SO1 to 4



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