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LC651154N Datasheet(PDF) 14 Page - Sanyo Semicon Device

Part # LC651154N
Description  Four-Bit CMOS Microcontrollers for Small-Scale Control Applications
PDF  39 Pages
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Manufacturer  SANYO [Sanyo Semicon Device]
Direct Link  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC651154N Datasheet(HTML) 14 Page - Sanyo Semicon Device

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No. 6278-14/39
LC651154N, 651154F, 651154L, 651152N, 651152F, 651152L
Parameter
Symbol
Conditions
Applicable pins and notes
Ratings
Unit
min
typ
max
• Output n-channel transistors off
IIH (1)
(Including the n-channel transistor
5.0
off leakage current.)
• VIN = 13.5 V
High-level input current
• Output n-channel transistors off
IIH (2)
(Including the n-channel transistor
Ports A and G with the
1.0
µA
off leakage current.)
open-drain specifications
• VIN = VDD
IIH (3)
When an external clock is used,
OSC1
1.0
VIN = VDD
IIL (1)
• Output n-channel transistors off
Ports with the open-drain
–1.0
• VIN = VSS
specifications
IIL (2)
• Output n-channel transistors off
Ports with the pull-up
–1.3
–0.35
mA
Low-level input current
• VIN = VSS
resistor specifications
IIL (3)
VIN = VSS
RES
–45
–10
IIL (4)
When an external clock is used,
OSC1
–1.0
µA
VIN = VSS
VOH (1)
• IOH = –50 µA
Ports with the pull-up
VDD – 1.2
High-level output voltage
• VDD = 4.0 to 6.0 V
resistor specifications
VOH (2)
IOH = –10 µA
Ports with the pull-up
VDD – 0.5
resistor specifications
VOL (1)
• IOL = 10 mA
Port
1.5
Low-level output voltage
• VDD = 4.0 to 6.0 V
VOL (2)
When IOL = 1 mA and the IOL for
Port
0.5
V
each port is 1 mA or less.
Hysteresis voltage
VHIS
0.1 VDD
High-level threshold
VtH
0.4 VDD
0.8 VDD
voltage
Low-level threshold
VtL
0.2 VDD
0.6 VDD
voltage
Current drain *6
• Operating, with the output
IDDOP (1)
n-channel transistors off
VDD
1.5
4
Two-pin RC oscillator
• With the ports at VDD
• Figure 2, fosc = 800 kHz (typical)
Ceramic oscillator
IDDOP (2) • Figure 3, 4 MHz, divide-by-three circuit used
VDD
1.5
5
IDDOP (3) • Figure 3, 4 MHz, divide-by-four circuit used VDD
1.5
4
IDDOP (4) • Figure 3, 400 kHz
VDD
1.0
2.5
mA
IDDOP (5) • Figure 3, 800 kHz
VDD
1.5
4
• 200 kHz to 1444 kHz, no divider
circuit
External clock
IDDOP (6)
• 600 kHz to 4330 kHz, divide-by-
VDD
1.5
5
three circuit used
• 800 kHz to 4330 kHz, divide-by-
four circuit used
Output n-channel transistors off,
VDD
0.05
10
Standby mode
IDDst
VDD = 6 V
µA
Ports at VDD, VDD = 3 V
VDD
0.025
5
Electrical Characteristics at Ta = –40 to +85°C, VSS = 0 V, VDD = 3.0 to 6.0 V (Unless otherwise specified.)
Continued on next page.
RES, INT, SCK, SI, and
OSC1 with Schmitt
specifications*5
Ports C, D, E and F with
the open-drain
specifications



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