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MIC2267YML Datasheet(PDF) 9 Page - Micrel Semiconductor

Part # MIC2267YML
Description  Input Current Limiting Synchronous Buck Regulator
PDF  19 Pages
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

MIC2267YML Datasheet(HTML) 9 Page - Micrel Semiconductor

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Micrel Inc.
MIC2267
January 2011
9
M9999-011711-A
Functional Diagram
Figure 1. MIC2267 Functional Block Diagram
Functional Description
The MIC2267 is an input current limited, 2A synchronous
buck regulator. The part offers control of the input
average current limit and the time constant of the current
limit response, allowing full control of the input current
profile during load steps and plug in events. The P-
Channel high side switch allows for 100% duty cycle
operation. Optimization of the loop bandwidth can be
achieved using the available connections to the slope
compensation ramp and error amplifier nodes. For logic
control and error flagging, the MIC2267 has an enable
function and a Power Good function.
VIN
The input supply (VIN) provides power to the internal
power MOSFETs and the analog control circuitry. The
VIN operating range is 3V to 5.5V. A minimum bypass
capacitor of 10µF should be placed close to the input
(VIN) pin and the ground (PGND) pin. Refer to the Layout
Recommendations
section for details on placing the
input capacitor.
LIMIT
The current limit as set by the RLIMIT resistor (Nominally,
ILIMIT = 75k/RLIMIT) is converted to the total charge
allowed in one cycle (QTOT). So if the current limit is 1A
and the frequency is 1MHz, since Q = I x T, the total
charge allowed QTOT = 1µC. If for example, a 1µF
capacitor CTOT is used to store this charge, since Q = C x
V, the voltage would be 1V.
If a replica of the input current is then integrated and the
resultant input charge per cycle:
∫
dt
).
t
(
I
=
Q
T
O IN
IN
Is stored on a similar 1µF capacitor CINT, then input
current limit is reached when the voltage on the CINT
capacitor reaches 1V, i.e. QIN ≥ QTOT. Once this
condition is satisfied and the FILTER delay time has
elapsed, the P-Channel switch cycle is terminated. At
the beginning of each cycle the integration storage
capacitors are discharged. In the actual circuit the
storage capacitor is in the order of 5pF and the replica
current is scaled down accordingly.



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