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HT68F03 Datasheet(PDF) 17 Page - Holtek Semiconductor Inc |
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HT68F03 Datasheet(HTML) 17 Page - Holtek Semiconductor Inc |
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17 / 147 page  Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions fTIMER Timer I/P Frequency (TMR) 2.2~ 5.5V ¾ 2 ¾ 8 MHz 2.7~ 5.5V ¾ 2 ¾ 10 MHz 3.3~ 5.5V ¾ 2 ¾ 12 MHz 4.5~ 5.5V ¾ 2 ¾ 16 MHz fLIRC System Clock (LIRC) 5V Ta=25 °C -10% 32 +10% kHz tRES External Reset Low Pulse Width ¾¾ 1 ¾¾ ms tINT Interrupt Pulse Width ¾¾ 1 ¾¾ tSYS tLVR Low Voltage Width to Reset ¾¾ 120 240 480 ms tLVD Low Voltage Width to Interrupt ¾¾ 20 45 90 ms tLVDS LVDO stable time ¾¾ 15 ¾¾ ms tBGS VBG Turn on Stable Time ¾¾ 200 ¾¾ ms tSST System Start-up Timer Period (Wake-up from HALT) ¾ fSYS=XTAL or RTC OSC ¾ 1024 ¾ tSYS fSYS=ERC or HIRC OSC ¾ 15~16 ¾ fSYS=LIRC OSC ¾ 1~2 ¾ Note: 1. tSYS=1/fSYS 2. * For fERC, as the resistor tolerance will influence the frequency a precision resistor is recommended. 3. To maintain the accuracy of the internal HIRC oscillator frequency, a 0.1 mF decoupling capacitor should be connected between VDD and VSS and located as close to the device as possible. A/D Converter Characteristics Ta=25 °C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions AVDD A/D Converter Operating Voltage ¾ VREF=AVDD 2.7 ¾ 5.5 V VADI A/D Converter Input Voltage ¾¾ 0 ¾ VREF V VREF A/D Converter Reference Voltage ¾¾ 2 ¾ AVDD V DNL Differential Non-linearity 5V tADCK= 1.0 ms ¾±1 ±2 LSB INL Integral Non-linearity 5V tADCK= 1.0 ms ¾±2 ±4 LSB IADC Additional Power Consumption if A/D Converter is Used 3V No load, tADCK= 0.5 ms ¾ 0.90 1.35 mA 5V No load, tADCK= 0.5 ms ¾ 1.20 1.80 mA tADCK A/D Converter Clock Period 2.2~ 5.5V ¾ 0.5 ¾ 10 ms tADC A/D Conversion Time (Include Sample and Hold Time) 2.2~ 5.5V 12-bit A/D Converter ¾ 16 ¾ tADCK tADS A/D Converter Sampling Time 2.2~ 5.5V ¾¾ 4 ¾ tADCK tON2ST A/D Converter On-to-Start Time 2.2~ 5.5V ¾ 2 ¾¾ ms HT66F03/HT66F04/HT68F03/HT68F04 Rev. 1.30 17 February 17, 2011 Ta=25 °C |
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