MIC3808/3809

Micrel

MIC3808/3809

8

April 2005

Functional Description

The MIC3808/9 is a high-speed power supply controller with

and turn-off than the MIC3809. The outputs of the controller

operate in a push-pull fashion with a guaranteed dead time

between them. A block diagram of the MIC3808/9 controller

is shown in Figure 1.

The oscillator and output gate drive signals are disabled

output drivers eliminates glitching or random pulsing during

parator also turns off the internal soft-start discharge FET,

slowly bringing up the COMP pin voltage.

voltage may cause excessive power dissipation in the

MIC3808/9.

Soft-Start

The soft start feature helps reduce surge currents at the

power supply input source. An internal current source and

capacitor ramp up from 0V to near Vdd at a typical rate of

1V/ms. The softstart feature limits the output voltage of the

Functional Diagram

T

Q

/Q

Q

S

R

Q

S1

S2

R

Q

S

R

Oscillator

Peak Current

Comparator

Overcurrent

Comparator

PWM

Comparator

PWM

Latch

Slope = 1V/ms

Soft Start

2.2V

2.0V

0.5V

R

0.8V

14V

OUTA

OUTB

6

7

8

5

GND

0.5V

1.2R

0.75V

3.65V

Error

Amplifier

RC

4

FB

2

COMP

1

CS

3

Voltage

Reference

Figure 1. MIC3808 Block Diagram

error amplifier at the COMP pin. As the softstart voltage rises,

it allows the COMP pin voltage to rise, which in turn allows the

duty cycle of the output drivers to increase. The internal

softstart voltage is discharged and remains discharged dur-

ing the following conditions:

threshold

2. The voltage on the CS pin exceeds the

overcurrent comparator threshold

Once the internal softstart discharge FET is turned on, it

cannot be turned off until the internal softstart voltage drops

down below 0.5V. This insures a clean restart.

Oscillator

The oscillator operates at twice the switching frequency of

either OUTA or OUTB. The oscillator generates a sawtooth

waveform on the RC pin. The rising edge of the waveform is

controlled by the external resistor/capacitor combination.

The fall time is set by the on-resistance of the discharge FET

(see Figure 2). The fall time sets the delay (dead time)

between the turn-off of one output driver and the turn-on of the

other driver. A toggle flip-flop insures that drive signals to

OUTA and OUTB are alternated and therefore insures a

maximum duty cycle of less than 50% for each output driver.

Graphs of component values vs. oscillator frequency and

dead time are shown in the typical characteristic section of

this specification.