DS9490B datasheet(21/44 Pages) MAXIM

21 / 44 page

The last step to begin a mission is to issue the Start

Mission command. As soon as it has received this com-

mand, the DS1922E sets the MIP flag and clears the

MEMCLR flag. With the Immediate/Delayed Start Mode

(SUTA = 0), after as many minutes as specified by the

mission start delay are over, the device wakes up,

copies the current date and time to the Mission

Timestamp register, and logs the first entry of the mis-

sion. This increments both the mission samples counter

and device samples counter. All subsequent log entries

are made as specified by the value in the Sample Rate

If the Start Upon Temperature Alarm mode is chosen

(SUTA = 1) and temperature logging is enabled (ETL =

1), the DS1922E first waits until the start delay is over.

Then the device wakes up in intervals as specified by

the sample rate and EHSS bit and measures the tem-

perature. This increments the Device Samples Counter

when the temperature alarm occurred. However, the

Mission Sample Counter does not increment. One sam-

ple period later the Mission Timestamp register is set.

From then on, both the Mission Samples Counter and

Device Samples Counter registers increment at the

same time. All subsequent log entries are made as

specified by the value in the Sample Rate register and

the EHSS bit.

The general-purpose memory operates independently of

the other memory sections and is not write protected

during a mission. All the DS1922E’s memory can be read

at any time, e.g., to watch the progress of a mission.

Attempts to read the passwords read 00h bytes instead

of the data that is stored in the password registers.

Memory Access

Address Registers and Transfer Status

Because of the serial data transfer, the DS1922E

employs three address registers called TA1, TA2, and

E/S (Figure 8). Registers TA1 and TA2 must be loaded

with the target address to which the data is written or

from which data is sent to the master upon a Read

command. Register E/S acts like a byte counter and

transfer status register. It is used to verify data integrity

with Write commands. Therefore, the master only has

read access to this register. The lower 5 bits of the E/S

been written to the scratchpad. This address is called

ending offset. The DS1922E requires that the ending

offset is always 1Fh for a Copy Scratchpad to func-

tion. Bit 5 of the E/S register, called PF or partial byte

flag, is set if the number of data bits sent by the master

is not an integer multiple of 8. Bit 6 is always a 0. Note

that the lowest 5 bits of the target address also deter-

mine the address within the scratchpad, where interme-

diate storage of data begins. This address is called

byte offset. If the target address for a Write command is

13Ch, for example, the scratchpad stores incoming

data beginning at the byte offset 1Ch and is full after

only 4 bytes. The corresponding ending offset in this

example is 1Fh. For best economy of speed and

High-Temperature Logger iButton with 8KB

Data-Log Memory

______________________________________________________________________________________

BIT NUMBER

TARGET ADDRESS (TA1)

TARGET ADDRESS (TA2)

T15

T14

T13

T12

T11

T10

ENDING ADDRESS WITH

DATA STATUS (E/S)

(READ ONLY)

Figure 8. Address Registers

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