MAX4802ACXZ datasheet(5/15 Pages) MAXIM

5 / 15 page

Low-Charge-Injection, 8-Channel, High-Voltage

Analog Switches with 20MHz Serial Interface

_______________________________________________________________________________________

TIMING CHARACTERISTICS

(VDD = +2.7V to +6V, VPP = +40V to (VNN + 200V), VNN = -40V to -160V, TA = TMIN to TMAX, unless otherwise noted. Typical values

are at TA = +25°C.) (Note 2)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

ANALOG SWITCH

Turn-On Time

tON

VNO_ = VPP - 10V, RL = 10k

Ω, VNN = -40V

to -160V

5µs

Turn-Off Time

tOFF

VNO_ = VPP - 10V, RL = 10k

Ω, VNN = -40V

to -160V

5µs

Output Switching Frequency

fSW

Duty cycle = 50%

kHz

Maximum VCOM_, VNO_ Slew

Rate

dV/dt

(Note 4)

V/ns

LOGIC TIMING (Figure 1)

VDD = +5V ±10%

CLK Frequency

fCLK

Daisy chaining

VDD = +3V ±10%

MHz

VDD = +5V ±10%

DIN to CLK Setup Time

tDS

VDD = +3V ±10%

VDD = +5V ±10%

DIN to CLK Hold Time

tDH

VDD = +3V ±10%

VDD = +5V ±10%

CLK to LE Setup Time

tCS

VDD = +3V ±10%

VDD = +5V ±10%

LE Low Pulse Width

tWL

VDD = +3V ±10%

VDD = +5V ±10%

CLR High Pulse Width

tWC

VDD = +3V ±10%

VDD = +5V ±10%

CLK Rise and Fall Times (Note 4)

tR, tF

VDD = +3V ±10%

VDD = +5V ±10%, CL

≤ 20pF

CLK to DOUT Delay

tDO

VDD = +3V ±10%, CL

≤ 20pF

Note 2: Specifications at 0°C are guaranteed by correlation and design.

Note 3: The analog-signal input VCOM_ and VNO_ must satisfy VNN

≤ (VCOM_, VNO_) ≤ VPP, or remain unconnected during power-up

and power-down.

Note 4: Guaranteed by design and characterization; not production tested.

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