AD7280ABSTZ datasheet(42/48 Pages) AD

42 / 48 page

AD7280A

Rev. 0 | Page 42 of 48

Example 5: Read a Single Configuration Register

on All Parts

In this example, it is assumed that all AD7280As in the daisy

chain have been initialized to their correct device addresses.

Set Bit D0 of the control register to 1 on all parts. This write

enables the daisy-chain register read operation on all parts.

The 32-bit write command is 0x01C2B6E2 (see Table 27,

Write 1).

The register address corresponding to the configuration

all parts (see Table 13 for register addresses). In this example,

the cell balance register is read from all parts. The 32-bit

write command is 0x038A12B2 (see Table 27, Write 2).

Apply a CS low pulse that frames 32 SCLKs for each device

in the stack to read back the desired register contents from

all parts. This frame should simultaneously write the 32-bit

command 0xF800030A, as described in the

section (see

, Write 3).

Serial Interface

Table 27

Example 6: Read a Single Configuration Register

from One Part

In this example, it is assumed that all AD7280As in the daisy

chain have been initialized to their correct device addresses.

Set Bits[D13:D12] of the control register to 1 on all parts.

This setting turns off the read operation on all parts. The

32-bit write command is 0x01A6151A (see Table 28, Write 1).

Set Bits[D13:D12] of the control register of the part to be

read from to 0. In this example, Device 1 in the stack is to

be read from. The 32-bit write command is 0x81A00222

(see Table 28, Write 2).

The register address corresponding to the configuration

the part that is to be read (see Table 13 for register

addresses). This example reads the alert register from

Device 1 in the stack. The 32-bit write command is

0x8389800A (see Table 28, Write 3).

Apply a CS low pulse that frames 32 SCLKs to read back

the desired register contents. This frame should simultan-

eously write the 32-bit command 0xF800030A, as

described in the

section (see

Write 4). When reading from a single device in a stack of

AD7280As, the SCLK frequency must be lower than

1 MHz to read back the register data from parts higher in

the chain than the master device.

Serial Interface

Table 28

Table 27. Example 5: Reading a Single Configuration Register from All AD7280A Devices

Write Command

Device Address

Data

Write All

D11

8-Bit CRC

D2 to D0

32-Bit Write

Command

Write 1

00000

001110

00010101

11011100

010

0x01C2B6E2

Write 2

00000

011100

01010000

01010110

010

0x038A12B2

Write 3

11111

000000

00000000

01100001

010

0xF800030A

Table 28. Example 6: Reading a Single Configuration Register from One AD7280A Device

Write Command

Device Address

Data

Write All

D11

8-Bit CRC

D2 to D0

32-Bit Write

Command

Write 1

00000

001101

00110000

10100011

010

0x01A6151A

Write 2

10000

001101

00000000

01000100

010

0x81A00222

Write 3

10000

011100

01001100

00000001

010

0x8389800A

Write 4

11111

000000

00000000

01100001

010

0xF800030A

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