AD7280ABSTZ datasheet(26/48 Pages) AD

26 / 48 page

AD7280A

Rev. 0 | Page 26 of 48

An example of how damage to the external transistors can occur

is a connection sequence that first provides the system ground

(the ground supply to the master AD7280A in the daisy chain)

followed by a connection from any of the battery cells at a

potential high enough to exceed the VGS of the cell balancing

transistor, for example 40 V. If these two connections are the

first battery connections made in the system, the result is 40 V

being applied to one of the VINx pins of the AD7280A through

a series resistor. The 40 V battery connection is also directly

applied to the source input of one of the cell balancing transistors.

However, because no power has been supplied to the VDD pin of

the AD7280A, all the CBx outputs are at 0 V. This results in a

reverse voltage of 40 V across the VGS of the external transistor,

which can damage the device.

Cell Balance Timers

The AD7280A offers six cell balance timer registers that allow

the on time of each CBx output to be programmed. The CBx

timers can be set to a value from 0 minutes to 36.9 minutes. The

resolution of the CBx timers is 71.5 sec. A value of 0x00 in a

CBx timer register means that the timer is not activated. A non-

zero value programmed to a CBx timer register configures the

CBx timer for use, but the CBx outputs and the CBx timers are

not activated until the cell balance register is written to. At the

end of the individually programmed CBx time, the respective

CBx output returns to its default state of 0 V output with respect

to the absolute amplitude of the negative terminal of the battery

cell that is being balanced. Also at this time, the cell balance

their programmed values. The default value of the CBx timer

registers on power-up is 0x00.

When using the cell balance timer feature, note that the timer on

each cell balance output is operated from a single CB counter.

When a nonzero value is programmed to any CBx timer register,

this counter is activated by writing a nonzero value to the cell

balance register. The current value of the counter is compared

to the values programmed to each CBx timer register at 4.5 sec

intervals (71.5 sec/16). When the value in the counter reaches

the value in the CBx timer register, the cell balance output

corresponding to that CBx timer register is switched off. Note

that the cell balance register has a higher priority than the CBx

timer registers. A CBx output can be switched off by writing to

the cell balance register even if the value programmed to the

respective CBx timer register has not expired.

Writing a zero or a nonzero value to an active CBx timer

cell balance counter being reset and automatically restarted.

Note that overwriting the CBx timer with 0 restarts the counter,

but, because the timer value is now 0, the corresponding CB

output is switched off. Any write to a nonactive CBx timer

effect on the cell balance counter.

Programming the Cell Balance Timers

It is recommended that the required CBx timer values be

programmed to each individual CBx timer register before

activating the CB counter. Changing the CBx timer values while

the counter is running is possible; however, writing to an active

CBx timer register resets the counter, as described in the Cell

Balance Timers section.

Cell Balance Timer Example 1

The following sequence of steps programs a value of 214.5 sec

to the CB1 and CB2 timer registers.

Set Bits[D4:D3] of the CB1 timer register and the CB2

timer register high.

Set Bits[D3:D2] of the cell balance register high.

Wait 60 sec.

Set Bits[D4:D3] of the CB3 timer register high.

Set Bits[D4:D2] of the cell balance register high.

In this example, the CB1 and CB2 outputs are switched on and

the cell balance counter is activated. Following the 60 sec wait,

a value of 214.5 sec is written to the CB3 timer register, the CB3

output is switched on, and the on state of the CB1 and CB2

outputs is maintained. In this example, all three CB outputs are

switched off at the same time (214.5 sec). This is because the CB

counter was already active before the CB3 timer register was

programmed and the CB3 output selected.

Cell Balance Timer Example 2

In this example, follow the same sequence of steps described in

the Cell Balance Timer Example 1 section, but increase the wait

step from 60 sec to any value greater than 214.5 sec.

The initial steps set up the CB1 and CB2 timers and activate the

CB1 and CB2 outputs. However, because the wait state is now

longer than the time programmed to the CB1 and CB2 timers,

the CB1 and CB2 timers expire before the additional writes to

configure CB3. The CB1 and CB2 outputs switch off, a 0 is

written to Bits[D3:D2] of the cell balance register, and the CB

counter is reset to 0x00 before the commands to program the

CB3 timer and to switch on the CB3 output are received.

In this example, the second write to the cell balance registers—

which selects the CB1, CB2, and CB3 outputs—is considered a

new activation of the CB counter. The CB1, CB2, and CB3

outputs switch on and, if no further commands are written to

the AD7280A, all three outputs switch off 214.5 sec after this

second activation of the CB counter.

AD7280ABSTZ Datasheet(PDF) 26 Page - Analog Devices

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