| Electronic Components Datasheet Search |
|
UCD90160 Datasheet(PDF) 21 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
UCD90160 Datasheet(HTML) 21 Page - Texas Instruments |
|
21 / 41 page ![]() 3ms 3ms 1ms GPI GPO UCD90160 www.ti.com SLVSAC8A – NOVEMBER 2010 – REVISED APRIL 2011 Table 5. Rail-Status Types for Boolean Logic Rail-Status Types POWER_GOOD TON_MAX_FAULT VOUT_UV_WARN_LATCH MARGIN_EN TOFF_MAX_WARN VOUT_UV_FAULT_LATCH MRG_LOW_nHIGH SEQ_ON_TIMEOUT TON_MAX_FAULT_LATCH VOUT_OV_FAULT SEQ_OFF_TIMEOUT TOFF_MAX_WARN_LATCH VOUT_OV_WARN SYSTEM_WATCHDOG_TIMEOUT SEQ_ON_TIMEOUT_LATCH VOUT_UV_WARN VOUT_OV_FAULT_LATCH SEQ_OFF_TIMEOUT_LATCH VOUT_UV_FAULT VOUT_OV_WARN_LATCH SYSTEM_WATCHDOG_TIMEOUT_LATCH GPO Delays The GPOs can be configured so that they manifest a change in logic with a delay on assertion, deassertion, both or none. GPO behavior using delays will have different effects depending if the logic change occurs at a faster rate than the delay. On a normal delay configuration, if the logic for a GPO changes to a state and reverts back to previous state within the time of a delay then the GPO will not manifest the change of state on the pin. In Figure 15 the GPO is set so that it follows the GPI with a 3ms delay at assertion and also at de-assertion. When the GPI first changes to high logic state, the state is maintained for a time longer than the delay allowing the GPO to follow with appropriate logic state. The same goes for when the GPI returns to its previous low logic state. The second time that the GPI changes to a high logic state it returns to low logic state before the delay time expires. In this case the GPO does not change state. A delay configured in this manner serves as a glitch filter for the GPO. Figure 15. GPO Behavior When Not Ignoring Inputs During Delay The Ignore Input During Delay bit allows to output a change in GPO even if it occurs for a time shorter than the delay. This configuration setting has the GPO ignore any activity from the triggering event until the delay expires. Figure 16 represents the two cases for when ignoring the inputs during a delay. In the case in which the logic changes occur with more time than the delay, the GPO signal looks the same as if the input was not ignored. Then on a GPI pulse shorter than the delay the GPO still changes state. Any pulse that occurs on the GPO when having the Ignore Input During Delay bit set will have a width of at least the time delay. Copyright © 2010–2011, Texas Instruments Incorporated 21 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |