MAX5965AEAX datasheet(39/54 Pages) MAXIM

39 / 54 page

High-Power, Quad, Monolithic, PSE Controllers

for Power over Ethernet

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Enable 2-event classification for a port by setting the corre-

sponding ENx_CL6 bit (Table 25). When the bit is enabled,

the classification cycle will be repeated three times at

21.3ms intervals. The device keeps the output voltage

around -9V between each cycle. The repetition of the clas-

sification cycles enables discovering of class 6 PDs. The

ENx_CL6 bit is active only in auto- or semi-mode.

Note: Performing three consecutive classifications in

manual mode is not the same as performing 2-event

classification in semi or auto mode.

Enable the SMODE function (Table 25) by setting

EN_WHDOG (R1Fh[7]) to 1. The SMODE_ bit goes high

when the watchdog counter reaches zero and the

port(s) switch over to hardware-controlled mode.

SMODE_ also goes high each and every time the soft-

ware tries to power on a port, but is denied since the

port is in hardware mode. A reset sets R1Ch = 00h.

Table 25. SMODE and 2-Event Enable Register

ADDRESS = 1Ch

SYMBOL

BIT

CoR or

R/W

DESCRIPTION

EN4_CL6

R/W

Port 4 2-event classification enabled

EN3_CL6

R/W

Port 3 2-event classification enabled

EN2_CL6

R/W

Port 2 2-event classification enabled

EN1_CL6

R/W

Port 1 2-event classification enabled

SMODE4

CoR

Port 4 hardware control flag

SMODE3

CoR

Port 3 hardware control flag

SMODE2

CoR

Port 2 hardware control flag

SMODE1

CoR

Port 1 hardware control flag

Table 26. Watchdog Register

ADDRESS = 1Eh

SYMBOL

BIT

R/W

DESCRIPTION

R/W

WDTIME[7]

R/W

WDTIME[6]

R/W

WDTIME[5]

R/W

WDTIME[4]

R/W

WDTIME[3]

R/W

WDTIME[2]

R/W

WDTIME[1]

WDTIME

R/W

WDTIME[0]

Set EN_WHDOG (R1Fh[7]) to 1 to enable the watchdog

function. When activated, the watchdog timer counter,

WDTIME[7:0], continuously decrements toward zero

once every 164ms. Once the counter reaches zero

(also called watchdog expiry), the MAX5965A/

MAX5965B enter hardware-controlled mode and each

port shifts to a mode set by the HWMODE_ bit in regis-

ter R1Fh (Table 27). Use software to set WDTIME

(Table 26) and continuously set this register to some

nonzero value before the register reaches zero to pre-

vent a watchdog expiry. In this way, the software grace-

fully manages the power to ports upon a system crash

or switchover.

While in hardware-controlled mode, the MAX5965A/

MAX5965B ignore all requests to turn the power on and

the flag SMODE_ indicates that the hardware has taken

control of the MAX5965A/MAX5965B operation. In addi-

tion, the software is not allowed to change the mode of

operation in hardware-controlled mode. A reset sets

R1Eh = 00h.

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