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PCA9564 Datasheet(PDF) 16 Page - NXP Semiconductors |
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PCA9564 Datasheet(HTML) 16 Page - NXP Semiconductors |
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16 / 32 page ![]() Philips Semiconductors Product data sheet PCA9564 Parallel bus to I2C-bus controller 2006 Sep 01 16 STA FLAG TIME OUT SDA LINE SCL LINE START CONDITION SU00976 Figure 7. Forced access to a busy I2C-bus • I2C BUS OBSTRUCTED BY A LOW LEVEL ON SCL OR SDA An I2C-bus hang-up occurs if SDA or SCL is pulled LOW by an uncontrolled source. If the SCL line is obstructed (pulled LOW) by a device on the bus, no further serial transfer is possible, and the SIO hardware cannot resolve this type of problem. When this occurs, the problem must be resolved by the device that is pulling the SCL bus line LOW. When the SCL line stays LOW for a period equal to the time-out value, the ’64 concludes that this is a bus error and behaves in a manner described on page 5 under “Time-out Register”. If the SDA line is obstructed by another device on the bus (e.g., a slave device out of bit synchronization), the problem can be solved by transmitting additional clock pulses on the SCL line (see Figure 8). The SIO hardware sends out nine clock pulses followed by the STOP condition. If the SDA line is released by the slave pulling it LOW, a normal START condition is transmitted by the SIO, state 08H is entered and the serial transfer continues. If the SDA line is not released by the slave pulling it LOW, then the SIO concludes that there is a bus error, loads 70H in I2CSTA, generates an interrupt signal, and releases the SCL and SDA lines. After the microcontroller reads the status register, it needs to send an external reset signal in order to reset the SIO. If a forced bus access occurs or a repeated START condition is transmitted while SDA is obstructed (pulled LOW), the SIO hardware performs the same action as described above. In each case, state 08H is entered after a successful START condition is transmitted and normal serial transfer continues. Note that the CPU is not involved in solving these bus hang-up problems. • BUS ERROR A bus error occurs when a START or STOP condition is present at an illegal position in the format frame. Examples of illegal positions are during the serial transfer of an address byte, a data or an acknowledge bit. The SIO hardware only reacts to a bus error when it is involved in a serial transfer either as a master or an addressed slave. When a bus error is detected, SIO releases the SDA and SCL lines, sets the interrupt flag, and loads the status register with 00H. This status code may be used to vector to a service routine which either attempts the aborted serial transfer again or simply recovers from the error condition as shown in Table 6. The microcontroller must send an external reset signal to reset the SIO. STA FLAG SDA LINE SCL LINE su01663 12 3 4 56 7 8 9 START CONDITION STOP CONDITION Figure 8. Recovering from a bus obstruction caused by a LOW level on SDA |
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