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AS8510

Datasheet - Detailed Descr i p ti on

7.8.1 SPI Frame

A frame is formed by a first byte for command and address/configuration and a following bit stream that can be formed by an integer number of

bytes. Command is coded on the 1 first bit, while address is given on LSB 7 bits (see Table 30).

If the command is read or write, one or more bytes follow. When the micro-controller sends more bytes (keeping CS LOW and SCLK toggling),

the SPI interface increments the address of the previous data byte and writes/reads data to/from consecutive addresses.

7.8.2 Write Command

For write command, C0=0. After the command code C0 is transferred, the address of register to be written is provided from MSB to LSB.

Subsequently one or more data bytes can be transferred from MSB to LSB. For each data byte following the first one, used address is the

incremented value of the previously written address. Each bit of the frame has to be driven by the SPI master on the SPI clock transfer edge. The

SPI slave samples it on the next clock edge. These edges are determined by the level of SCLK as shown in Table 29. Figure 10 and Figure 11

are examples of write command without and with address self-increment.

Figure 10. Protocol for Serial Data Write with Length = 1

Table 30. Command Bits

Command Bits

Register Address or Transmission Configuration

C0

A6

A5

A4

A3

A2

A1

A0

Table 31. Command Bits

C0

Command

<A6:A0>

Description

0

WRITE

ADDRESS

Writes data byte on the given starting address.

1

READ

ADDRESS

Read data byte from the given starting address.

CS

SCLK

SDI

SDO

0

A6

A5

A4

A0

A1

A2

A3

D0

D1

D2

D3

D4

D5

D7

D6

Data D7 – D0 is moved

to Address A4..A0 here