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LTC2655 Datasheet(PDF) 18 Page - Linear Technology

Part # LTC2655
Description  Octal 16-/12-Bit Rail-to-Rail DACs with 10ppm/째C Max Reference
PDF  26 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2655 Datasheet(HTML) 18 Page - Linear Technology

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LTC2656
18
2656fa
OPERATION
The LTC2656 is a family of octal voltage output DACs in
20-lead 4mm × 5mm QFN and in 20-lead thermally en-
hancedTSSOPpackages.EachDACcanoperaterail-to-rail
in external reference mode, or with its full-scale voltage
set by an integrated reference. Four combinations of ac-
curacy (16-bit and 12-bit), and full-scale voltage (2.5V or
4.096V) are available. The LTC2656 is controlled using a
4-wire SPI/MICROWIRE compatible interface.
Power-On Reset
TheLTC2656-L/LTC2656-Hcleartheoutputtozero-scaleif
the PORSEL pin is tied to GND, when power is first applied,
makingsysteminitializationconsistentandrepeatable.For
some applications, downstream circuits are active during
DAC power-up and may be sensitive to nonzero outputs
from the DAC during this time. The LTC2656 contains
circuitry to reduce the power-on glitch. The analog outputs
typicallyriselessthan10mVabovezero-scaleduringpower
on if the power supply is ramped to 5V in 1ms or more.
In general, the glitch amplitude decreases as the power
supply ramp time is increased. See Power-On Reset Glitch
in the Typical Performance Characteristics.
Alternatively, if the PORSEL pin is tied to VCC, the
LTC2656-L/ LTC2656-H sets the output to mid-scale when
power is first applied.
Power Supply Sequencing and Start-Up
For the LTC2656 family of parts, the internal reference is
powered up at start-up by default. If an external reference
is to be used, the REFCOMP pin must be hardwired to
GND. Having REFCOMP hardwired to GND at power up
will cause the REFIN/OUT pin to become high impedance
and will allow for the use of an external reference at start-
up. However in this configuration, the internal reference
will still be on even though it is disconnected from the
REFIN/OUT pin and will draw supply current. In order
to use external reference after power-up, the command
Select External Reference (0111b) should be used to turn
the internal reference off (see Table 1.)
The voltage at REFIN/OUT should be kept within the range
– 0.3V ≤ REFIN/OUT ≤ VCC + 0.3V if the external reference
is to be used (see Absolute Maximum Ratings). Particular
care should be taken to observe these limits during power
supply turn-on and turn-off sequences, when the voltage
at VCC is in transition.
Transfer Function
The digital-to-analog transfer function is:
VOUT(IDEAL) =
k
2N


• 2 • VREF – VREFLO
(
) + VREFLO
where k is the decimal equivalent of the binary DAC input
code, N is the resolution of the DAC, and VREF is the volt-
age at the REFIN/OUT pin. The resulting DAC output span
is0Vto2•VREF, as it is necessary to tie REFLO to GND.
VREF is nominally 1.25V for LTC2656-L and 2.048V for
LTC2656-H, in internal reference mode.
Table 1. Command and Address Codes
COMMAND*
C3 C2 C1 C0
0
0
0
0 Write to Input Register n
0
0
0
1 Update (Power Up) DAC Register n
0
0
1
0 Write to Input Register n, Update (Power Up) All
0
0
1
1 Write to and Update (Power Up) n
0
1
0
0 Power Down n
0
1
0
1 Power Down Chip (All DACs and Reference)
0
1
1
0 Select Internal Reference (Power-Up Reference)
0
1
1
1 Select External Reference (Power-Down
Reference)
1
1
1
1 No Operation
ADDRESS (n)*
A3 A2 A1 A0
0
0
0
0 DAC A
0
0
0
1 DAC B
0
0
1
0 DAC C
0
0
1
1 DAC D
0
1
0
0 DAC E
0
1
0
1 DAC F
0
1
1
0 DAC G
0
1
1
1 DAC H
1
1
1
1 All DACs
*Command and address codes not shown are reserved and should not
be used.
Serial Interface
The CS/LD input is level triggered. When this input is taken
low, it acts as a chip-select signal, powering on the SDI
and SCK buffers and enabling the input shift register. Data
(SDI input) is transferred at the next 24 rising SCK edges.



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