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LTC2656

2656fa

OPERATION

are powered down, then the main bias generation circuit

block has been automatically shut down in addition to the

individual DAC amplifiers and integrated reference. In this

case, the power-up delay time is 14µs. The power up of

the integrated reference depends on the command that

powered it down. If the reference is powered down using

theselectexternalreferencecommand(0111b),thenitcan

only be powered back up using select internal reference

command (0110b). However if the reference was powered

down using power-down chip command (0101b), then in

addition to select internal reference command (0110b),

any command that powers up the DACs will also power

up the integrated reference.

Asynchronous DAC Update Using LDAC

In addition to the update commands shown in Table 1, the

LDAC pin asynchronously updates all the DAC registers

with the contents of the input registers.

If CS/LD is high, a low on the LDAC pin causes all the

DAC registers to be updated with the contents of the

input registers.

If CS/LD is low, a low going pulse on the LDAC pin before

the rising edge of CS/LD powers up all the DAC outputs but

does not cause the output to be updated. If LDAC remains

lowaftertherisingedgeofCS/LD,thenLDACisrecognized,

the command specified in the 24-bit word just transferred

is executed and the DAC outputs are updated.

The DAC outputs are powered up when LDAC is taken

low, independent of the state of CS/LD. The integrated

reference is also powered up if it was powered down us-

ing power-down chip (0101b) command. The integrated

reference will not power up when LDAC is taken low,

if it was powered down using select external reference

(0111b) command.

If LDAC is low at the time CS/LD goes high, it inhibits any

software power-down command (power down n, power-

down chip, select external reference) that was specified

in the input word.

Reference Modes

For applications where an accurate external reference is

notavailable,theLTC2656hasauser-selectable,integrated

reference. The LTC2656-L has a 1.25V reference that pro-

vides a full-scale DAC output of 2.5V. The LTC2656-H has

a 2.048V reference that provides a full-scale DAC output

of 4.096V. Both references exhibit a typical temperature

drift of 2ppm/°C. Internal reference mode can be selected

by using command 0110b, and is the power-on default. A

bufferisneedediftheinternalreferenceisrequiredtodrive

external circuitry. For reference stability and low noise, it

is recommended that a 0.1µF capacitor be tied between

REFCOMP and GND. In this configuration, the internal

reference can drive up to 0.1µF capacitive load without any

stability problems. In order to ensure stable operation, the

capacitive load on the REFIN/OUT pin should not exceed

the capacitive load on the REFCOMP pin.

The DAC can also operate in external reference mode us-

ing command 0111b. In this mode, the REFIN/OUT pin

acts as an input that sets the DAC’s reference voltage. The

input is high impedance and does not load the external

reference source. The acceptable voltage range at this

pin is 0.5V ≤ REFIN/OUT ≤ VCC/2. The resulting full-scale

outputvoltageis2•VREFIN/OUT. For using external refer-

ence at start-up, see the Power Supply Sequencing and

Start-Up section.

Integrated Reference Buffers

Each of the eight DACs in LTC2656 has its own integrated

high performance reference buffer. The buffers have very

highinputimpedanceanddonotloadthereferencevoltage

source. These buffers shield the reference voltage from

glitches caused by DAC switching and thus minimize DAC-

to-DACdynamiccrosstalk.TypicallyDAC-to-DACcrosstalk

is less than 3nV•s. By tying 0.1µF capacitors between

REFCOMP and GND, and also between REFIN/OUT and

GND,thisnumbercanbereducedtolessthan1nV•s.See

the curve DAC-to-DAC Dynamic Crosstalk in the Typical

Performance Characteristics section.

Voltage Outputs

EachoftheLTC2656’seightrail-to-railoutputamplifierscon-

tained in these parts has a guaranteed load regulation when

sourcing or sinking up to 15mA at 5V (7.5mA at 3V).

Load regulation is a measure of the amplifier’s ability to

maintain the rated voltage accuracy over a wide range of

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