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LTC2657 Datasheet(PDF) 18 Page - Linear Technology

Part # LTC2657
Description  Octal I2C 16-/12-Bit Rail-to-Rail DACs with 10ppm/째C Max Reference
PDF  24 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2657 Datasheet(HTML) 18 Page - Linear Technology

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LTC2657
18
2657f
OPERATION
The LTC2657 is a family of octal voltage output DACs
in 20-lead 4mm
× 5mm QFN and in 20-lead thermally
enhanced TSSOP packages. Each DAC can operate rail-
to-rail in external reference mode, or with its full-scale
voltage set by an integrated reference. Four combinations
of accuracy (16- and 12-bit), and full-scale voltage (2.5V
or 4.096V) are available. The LTC2657 is controlled using
a 2-wire I2C compatible interface.
Power-On Reset
The LTC2657-L/-H clear the output to zero-scale if the
PORSEL pin is tied to GND when power is first applied,
making system initialization consistent and repeatable. For
some applications, downstream circuits are active during
DAC power-up, and may be sensitive to nonzero outputs
from the DAC during this time. The LTC2657 contains
circuitry to reduce the power-on glitch. The analog outputs
typically rise less than 10mV above zero-scale during power
on if the power supply is ramped to 5V in 1ms or more. In
general, the glitch amplitude decreases as the power supply
ramp time is increased. See “Power-On Reset Glitch” in
the Typical Performance Characteristics section.
Alternatively, if PORSEL is tied to VCC, The LTC2657-L/-H
set the output to mid-scale when power is first applied.
Power Supply Sequencing and Start-Up
For the LTC2657 family of parts, the internal reference is
powered-up at start-up by default. If an external reference is
to be used, the REFCOMP pin (Pin 4 –TSSOP, Pin 2 -QFN )
must be hardwired to GND. This configuration allows the
use of an external reference at start-up and converts the
REFIN/OUT pin to an input. However, the internal reference
will still be ON and draw supply current. In order to use
an external reference, command 0111b should be used
to turn the Internal Reference OFF.(See Table1.)
The voltage at REFIN/OUT (Pin 7 –TSSOP, Pin 5 -QFN)
should be kept within the range –0.3V ≤ REFIN/OUT
≤ VCC + 0.3V (see Absolute Maximum Ratings). Particular
care should be taken to observe these limits during power
supply turn-on and turn-off sequences, when the voltage
at VCC (Pin 19 –TSSOP, Pin 17 -QFN ) is in transition.
Transfer Function
The digital-to-analog transfer function is:
V
k
V
REFLO
REFL
OUT IDEAL
N
REF
()
•
=
⎛
⎝
⎜
⎞
⎠
⎟
•
−
⎡⎣
⎤⎦+
2
2O
O
where k is the decimal equivalent of the binary DAC input
code, N is the resolution, and VREF is the voltage at the
REFIN/OUT Pin. The resulting DAC output span is 0V to
2 • VREF, as it is necessary to tie REFLO to GND. VREF is
nominally 1.25V for LTC2657-L and 2.048V for LTC2657-H,
in Internal Reference Mode.
Table 1. Command and Address Codes
COMMAND*
C3
C2
C1
C0
0
0
0
0
Write to Input Register n
0
0
0
1
Update (Power Up) DAC Register n
0
0
1
0
Write to Input Register n, Update (Power Up) All
0
0
1
1
Write to and Update (Power Up) n
0
1
0
0
Power Down n
0
1
0
1
Power Down Chip (All DACs and Reference)
0
1
1
0
Select Internal Reference (Power-Up Reference)
0
1
1
1
Select External Reference (Power-Down
Reference)
1
1
1
1
No Operation
ADDRESS (n)*
A3
A2
A1
A0
0
0
0
0
DAC A
0
0
0
1
DAC B
0
0
1
0
DAC C
0
0
1
1
DAC D
0
1
0
0
DAC E
0
1
0
1
DAC F
0
1
1
0
DAC G
0
1
1
1
DAC H
1
1
1
1
All DACs
*Command and address codes not shown are reserved and should not be used.
Serial Interface
The LTC2657 communicates with a host using the stan-
dard 2-wire I2C interface. The Timing Diagrams (Figures
1 and 2) show the timing relationship of the signals on
the bus. The two bus lines, SDA and SCL, must be high
when the bus is not in use. External pull-up resistors or
current sources are required on these lines. The value of



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