Technical Note

13/14

BU95303

www.rohm.com

2010.10 - Rev.A

© 2010 ROHM Co., Ltd. All rights reserved.

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Start pulse timing

When the start pulse (SFTR, SFTL) is input two times, the data is sampled based on the second start pulse.

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Power Supply Sequence

Maintain the following power supply order to prevent the device from being destroyed.

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Notes for use

1. When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current may

flow instantaneously.

Therefore, give special consideration to power coupling capacitance, power wiring, width of GND wiring, and routing of

connections.

2. For ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal

powering sequence and delays.

Therefore, give special consideration to power coupling capacitance, power wiring, width of GND wiring, and routing of

wiring.

t

Input signal

V0～V13

1(E)

1(O)

2(O)

2(E)

CLKP

SFTR input

(SFTL)

DATA

2CLK period over

Invalid

1

st

2

nd