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TPS40400 Datasheet(PDF) 28 Page - Texas Instruments

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Part # TPS40400
Description  3.0-V TO 20-V PMBus SYNCHRONOUS BUCK CONTROLLER
PDF  72 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS40400 Datasheet(HTML) 28 Page - Texas Instruments

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10
OUT(ML)
V
VOUT _ MARGIN _ LOW
VOUT _ TRIM
2-
=
+
´
FB
OUT(nom)
V
VOUT _ SCALE _ LOOP
V
=
TPS40400
SLUS930B
– APRIL 2011 – REVISED OCTOBER 2011
www.ti.com
Command
VOUT_MARGIN_HIGH
Format
Linear, two's complement binary
Bit Position
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Access
r
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
Function
High Byte
Low Byte
Default Value
0
0
0
0
0
1
0
1
0
1
0
0
0
1
1
1
The default value of VOUT_MARGIN_HIGH is 0x547 or 1351. This corresponds to a default margin high voltage
of 1.32 V with the default VOUT_SCALE_LOOP value of 0.5 and external resistor selection to give 1.2 V nominal
output voltage.
VOUT_MARGIN_LOW (26h)
The VOUT_MARGIN_LOW command sets the target voltage which the output changes to when the
OPERATION command is set to "Margin Low". The contents of this register can be stored to non-volatile
memory using the STORE_DEFAULT_ALL or STORE_DEFAULT_CODE commands.
The effect of this command is determined by the settings of the VOUT_MODE command. In this device, the
VOUT_MODE is fixed to Linear with an exponent of
–10 (decimal). The actual output voltage commanded by a
margin high command can be found by:
(17)
The maximum margin range is
±25% of nominal VOUT. Nominal VOUT is set by external resistors and a 600 mV
error amplifier reference and does not include the offset generated by VOUT_TRIM. It is critical that the correct
value be programmed into VOUT_SCALE_LOOP for the correct margin value to be calculated. Error checking is
not performed when the VOUT_MARGIN_LOW command is issued. The error checking is done when the
OPERATION command is issued calling for a margin high state. At that time, values outside the
±25% range is
treated as invalid data and causes the device to set the CML bit in the STATUS_BYTE and the invalid data (ivd)
bit in the STATUS_CML registers. The output voltage is then set to the upper or lower limit depending on the
direction of the setting. The device state can be restored to power up defaults by issuing either the
RESTORE_DEFAULT_ALL or RESTORE_DEFAULT_CODE commands.
Command
VOUT_MARGIN_LOW
Format
Linear, two's complement binary
Bit Position
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Access
r
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
Function
High Byte
Low Byte
Default Value
0
0
0
0
0
1
0
0
0
1
0
1
0
0
0
1
The default value of VOUT_MARGIN_LOW is 0x451 or 1105. This corresponds to a default margin high voltage
of 1.08 V with the default VOUT_SCALE_LOOP value of 0.5 and external resistor selection to give 1.2 V nominal
output voltage.
VOUT_SCALE_LOOP (29h)
VOUT_SCALE_LOOP is equal to the feedback resistor ratio. The nominal output voltage is set by a resistor
divider and the internal 600mV reference voltage. The default value of VOUT_SCALE_LOOP is 0.5 meaning that
the reference voltage is one half of the output voltage. The contents of this register can be stored to non-volatile
memory using the STORE_DEFAULT_ALL or STORE_DEFAULT_CODE commands.
The correct setting for the VOUT_SCALE_LOOP parameter is shown in Equation 18.
(18)
It is important that this parameter is set correctly because it has an effect on several other parameters. Any
parameter that operates on or reports output voltage depends on the correct setting of this parameter for correct
results to be obtained.
28
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Copyright
© 2011, Texas Instruments Incorporated
Product Folder Link(s) :TPS40400



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