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HT16L23 Datasheet(PDF) 21 Page - Holtek Semiconductor Inc

Part # HT16L23
Description  RAM Mapping 52*4 / 48*8 LCD Driver
PDF  43 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT16L23 Datasheet(HTML) 21 Page - Holtek Semiconductor Inc

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Rev. 1.00
21
November 16, 2011
HT16L23
●
Compound Command Type
A Compound Command write operation requires a START condition, a slave address with an R/W bit, a
command byte, a command setting byte and a STOP condition for a compound command write operation.
Slave Address
ACK
Write
Command byte
ACK
S
0
1
1
1
1
1
0
0
1st
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
Command setting
ACK
P
2nd
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
I2C Compound Command Type Write Operation
●
Display RAM Single Data Byte
A display RAM data byte write operation requires a START condition, a slave address with an R/W bit, a
display data input command byte, a valid Register Address byte, a Data byte and a STOP condition.
Slave Address
ACK
Write
Command byte
ACK
S
0
1
1
1
1
1
0
0
Data byte
ACK
P
D7 D6 D5 D4 D3 D2 D1 D0
Register Address byte
ACK
2nd
1st
0
0
0
0
0
0
0
1
A0
A1
A2
A3
A4
A5
X
X
I2C Display RAM Single Data Byte Write Operation
Display RAM Page Write Operation
After a START condition the slave address with the R/W bit is placed on the bus followed with a display data input
command byte and the specified display RAM Register Address of which the contents are written to the internal
address pointer. The data to be written to the memory will be transmitted next and then the internal address pointer
will be incremented by 1 to indicate the next memory address location after the reception of an acknowledge clock
pulse. After the internal address point reaches the maximum memory address, the address pointer will be reset to
00H.
Slave Address
ACK
Write
ACK
S
0
1
1
1
1
1
0
0
ACK
2nd
ACK
Data byte
P
D7 D6 D5 D4 D3 D2 D1 D0
Nth data
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
2nd data
ACK
ACK
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
1st data
ACK
Register Address byte
Command byte
1st
0
0
0
0
0
0
0
1
A0
A1
A2
A3
A4
A5
X
X
I2C Interface N Bytes Display RAM Data Write Operation
Duty
SP1
SP0
Maximum Memory Address
1/4
0
X
19H
1
0
17H
1
1
15H
1/8
0
X
2FH
1
0
2BH
1
1
27H



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