LPC4310 datasheet(120/149 Pages) PHILIPS

120 / 149 page

LPC4350_30_20_10

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Objective data sheet

Rev. 3.1 — 5 January 2012

120 of 149

NXP Semiconductors

LPC4350/30/20/10

32-bit ARM Cortex-M4/M0 microcontroller

11.12 SD/MMC

11.13 LCD

Table 24.

Dynamic characteristics: SD/MMC

Tamb =25 C, 2.2 V  VDD(REG)(3V3)  3.6 V; 2.7 V  VDD(IO)  3.6 V, CL = 20 pF. Simulated values.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fclk

clock frequency

on pin SD_CLK; data

transfer mode

<tbd> MHz

on pin SD_CLK;

identification mode

<tbd> MHz

tsu(D)

data input set-up

time

on pins SD_CMD, SD_DATn

as inputs

<tbd> 9.9

th(D)

data input hold time

on pins SD_CMD, SD_DATn

as inputs

<tbd> 0.3

td(QV)

data output valid

delay time

on pins SD_CMD, SD_DATn

as outputs

6.9

<tbd> ns

th(Q)

data output hold time on pins SD_CMD, SD_DATn

as outputs

<tbd> 0.3

Fig 34. SD/MMC timing

002aag204

SD_CLK

SD_DATn (O)

SD_DATn (I)

td(QV)

th(D)

tsu(D)

Tcy(clk)

th(Q)

SD_CMD (O)

SD_CMD (I)

Table 25.

Dynamic characteristics: LCD

Tamb =25 C; 2.2 V  VDD(REG)(3V3)  3.6 V; 2.7 V  VDD(IO)  3.6 V; CL = 20 pF. Simulated values.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fclk

clock frequency

on pin LCD_DCLK

<tbd> MHz

tsu(D)

data input set-up

time

<tbd>

th(D)

data input hold time

td(QV)

data output valid

delay time

14.1

<tbd> ns

th(Q)

data output hold time

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