SS1

Vo u t 2

E N 1 / 2

Vo u t 1

SS/TR1

TPS54519

EN1

PWRGD1

SS/TR2

TPS54519

EN2

PWRGD2

D

´

Vout2 +

V

V ssoffset

R1 =

V ref

Iss

´

D

-

Vref

R1

R2 =

Vout2 +

V

Vref

V = Vout1

Vout 2

D

-

R1

2930

Vout1 145

V

>

´

-

´ D

TPS54519

www.ti.com

SLVSAT3

– SEPTEMBER 2011

Figure 20. Schematic for Ratio-metric Startup

Figure 21. Ratio-metric Startup with Vout1 Leading

Sequence

Vout2

Ratio-metric and simultaneous power supply sequencing can be implemented by connecting the resistor network

of R1 and R2 shown in Figure 22 to the output of the power supply that needs to be tracked or another voltage

reference source. Using Equation 5 and Equation 6, the tracking resistors can be calculated to initiate the Vout2

slightly before, after or at the same time as Vout1. Equation 7 is the voltage difference between Vout1 and

Vout2. The

ΔV variable is zero volts for simultaneous sequencing. To minimize the effect of the inherent SS/TR

to VSENSE offset (Vssoffset) in the slow start circuit and the offset created by the pullup current source (Iss) and

tracking resistors, the Vssoffset and Iss are included as variables in the equations. To design a ratio-metric start

up in which the Vout2 voltage is slightly greater than the Vout1 voltage when Vout2 reaches regulation, use a

negative number in Equation 5 through Equation 7 for

ΔV. Equation 7 will result in a positive number for

applications which the Vout2 is slightly lower than Vout1 when Vout2 regulation is achieved. Since the SS/TR pin

must be pulled below 40mV before starting after an EN, UVLO or thermal shutdown fault, careful selection of the

tracking resistors is needed to ensure the device will restart after a fault. Make sure the calculated R1 value from

Equation 5 is greater than the value calculated in Equation 8 to ensure the device can recover from a fault. As

the SS/TR voltage becomes more than 85% of the nominal reference voltage the Vssoffset becomes larger as

the slow start circuits gradually handoff the regulation reference to the internal voltage reference. The SS/TR pin

voltage needs to be greater than 0.87 V for a complete handoff to the internal voltage reference as shown in

Figure 21.

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(5)

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(8)

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Copyright

© 2011, Texas Instruments Incorporated

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