CS5463 datasheet(30/46 Pages) CIRRUS

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CS5463

DS678F3

lates due to an input above full scale. The level at which the modulator oscillates is significantly

higher than the voltage channel’s differential input voltage (current) range.

Note: The IOD and VOD bits may be ‘falsely’ triggered by very brief voltage spikes from the

power line. This event should not be confused with a DC overload situation at the inputs,

when the IOD and VOD bits will re-assert themselves even after being cleared, multiple

times.

LSD

Low Supply Detect. Set when the voltage at the PFMON pin falls below the low-voltage thresh-

old (PMLO), with respect to AGND pin. The LSD bit cannot be reset until the voltage at PFMON

pin rises back above the high-voltage threshold (PMHI).

FUP

Epsilon Updated. Indicates completion of a line frequency measurement and update of Epsilon.

Invalid Command. Normally logic 1. Set to logic 0 if an invalid command is received or the Sta-

tus Register

has not been successfully read.

6.1.12 Current and Voltage AC Offset Register ( VACoff , IACoff )

Address: 16 (Current AC Offset); 17 (Voltage AC Offset)

Default = 0x000000

The AC Offset Registers (VACoff, IACoff) are initialized to zero on reset, allowing for uncalibrated normal operation.

AC Offset Calibration updates these registers. This sequence lasts approximately (6N + 30) ADC cycles (where

N is the value of the Cycle Count Register). DRDY will be asserted at the end of the calibration. These values

may be read and stored for future system AC offset compensation. The value is represented in two's comple-

ment notation in the range of -1.0

 VACoff, IACoff  1.0, with the binary point to the right of the MSB

6.1.13 Operational Mode Register ( Mode )

Address: 18

Default = 0x000000

E2MODE

E2 Output Mode

0 = Energy Sign (default)

1 = Apparent Power

XVDEL

Enables an extra sample of voltage channel delay. XVDEL and XIDEL can not be enabled at

the same time.

XIDEL

Enables an extra sample of current channel delay. XVDEL and XIDEL can not be enabled at

the same time.

MSB

LSB

-(20)2-1

2-2

2-3

2-4

2-5

2-6

2-7

.....

2-17

2-18

2-19

2-20

2-21

2-22

2-23

E2MODE

XVDEL

654

XIDEL

IHPF

VHPF

IIR

E3MODE1

E3MODE0

POS

AFC

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