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LD6806F Datasheet(PDF) 6 Page - NXP Semiconductors |
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LD6806F Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 36 page ![]() LD6806_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 9 December 2011 6 of 36 NXP Semiconductors LD6806 series Ultra low-dropout regulator, low noise, 200 mA 7. Thermal characteristics [1] The overall Rth(j-a) can vary depending on the board layout. To minimize the effective Rth(j-a), all pins must have a solid connection to larger Cu layer areas for example to the power and ground layer. In multi-layer PCB applications, the second layer should be used to create a large heat spreader area directly below the LDO. If this layer is either ground or power, it should be connected with several vias to the top layer connecting to the device ground or supply. Avoid the use of solder-stop varnish under the chip. [2] Use the measurement data given for a rough estimation of the Rth(j-a) in your application. The actual Rth(j-a) value can vary in applications using different layer stacks and layouts. 8. Characteristics Table 9. Thermal characteristics Symbol Parameter Conditions Typ Unit Rth(j-a) thermal resistance from junction to ambient LD6806CX4/xxx, LD6806CX4/Cxxx [1][2] 130 K/W LD6806F/xxx [1][2] 220 K/W LD6806TD/xxx [1][2] 125 K/W Table 10. Electrical characteristics At recommended input voltages and Tamb = 40 Cto+85 C; voltages are referenced to GND (ground = 0 V); unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit V O output voltage variation VOUT < 1.8 V; IOUT = 1 mA Tamb = +25 C 3 0.5 +3 % 30 C T amb +85 C 4- +4 % VOUT 1.8 V; IOUT = 1 mA Tamb = +25 C 2 0.5 +2 % 30 C T amb +85 C 3- +3 % Line regulation error V O/(VOxVI) relative output voltage variation with input voltage VIN = (VO(nom) + 0.2 V) to 5.5 V [1] 0.1 - +0.1 %/V Load regulation error V O/(VOxIO) relative output voltage variation with output current 1mA I OUT 200 mA LD6806CX4/xxx, LD6806CX4/Cxxx - 0.0025 0.01 %/mA LD6806F/xxx, LD6806TD/xxx - 0.005 0.02 %/mA Vdo dropout voltage IOUT = 200 mA; VIN >VO(nom) [1] LD6806CX4/xxx, LD6806CX4/Cxxx - 60 100 mV LD6806F/xxx, LD6806TD/xxx - 80 130 mV VIL LOW-level input voltage pin EN 0 - 0.4 V VIH HIGH-level input voltage pin EN 1.4 - 5.5 V IOUT current on pin OUT - - 200 mA IOM peak output current VIN =(VO(nom) + 0.2 V) to 5.5 V [1] VO(nom) > 1.8 V; VOUT 0.95 VO(nom) 300 - - mA VO(nom) < 1.8 V; VOUT 0.9 VO(nom) 300 - - mA |
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