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LD6806F Datasheet(PDF) 12 Page - NXP Semiconductors |
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LD6806F Datasheet(HTML) 12 Page - NXP Semiconductors |
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12 / 36 page ![]() LD6806_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 9 December 2011 12 of 36 NXP Semiconductors LD6806 series Ultra low-dropout regulator, low noise, 200 mA 9.5 Line regulation Line regulation response is the capability of the circuit to maintain the nominal output voltage while varying the input voltage. Regulation % V V OUT V IN ----------------- 100 V OUT ------------- = (1) VIN (2) VOUT (1) VIN (2) VOUT Fig 17. Line regulation for LD6806CX4/12H Fig 18. Line regulation for LD6806F/12H time (ms) 0 0.8 0.6 0.2 0.4 001aan925 2 4 6 VIN (V) 0 1.4 1.8 1.2 1.6 2.0 VOUT (V) 1.0 (1) (2) time (ms) 0 0.2 0.4 0.6 0.7 0.5 0.3 0.1 001aan926 2 4 6 VIN (V) 0 1.4 1.8 1.2 1.6 2.0 VOUT (V) 1.0 (1) (2) (1) VIN (2) VOUT (1) VIN (2) VOUT Fig 19. Line regulation for LD6806CX4/25H Fig 20. Line regulation for LD6806F/25H time (ms) 0 0.4 0.3 0.1 0.2 001aan931 2 4 6 VIN (V) 0 2.51 2.54 2.47 2.53 2.55 VOUT (V) 2.45 2.49 2.46 2.52 2.48 2.50 (1) (2) time (ms) 0 0.4 0.3 0.1 0.2 001aan932 2 4 6 VIN (V) 0 2.51 2.54 2.47 2.53 2.55 VOUT (V) 2.45 2.49 2.46 2.52 2.48 2.50 (1) (2) |
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