HT45F43 datasheet(54/152 Pages) HOLTEK

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· Watchdog Time-out Reset during Normal Operation

The Watchdog time-out Reset during normal operation is the same as a hardware RES pin reset

except that the Watchdog time-out flag TO will be set to

²1².

· Watchdog Time-out Reset during SLEEP or IDLE Mode

The Watchdog time-out Reset during SLEEP or IDLE Mode is a little different from other kinds of

reset. Most of the conditions remain unchanged except that the Program Counter and the Stack

Pointer will be cleared to

²0² and the TO flag will be set to ²1². Refer to the A.C. Characteristics for

tSST details.

Note:

The tSST is 15~16 clock cycles if the system clock source is provided by ERC or HIRC. The tSST is 1024

clock for HXT or LXT. The tSST is 1~2 clock for LIRC.

Reset Initial Conditions

The different types of reset described affect the reset flags in different ways. These flags, known as

PDF and TO are located in the status register and are controlled by various microcontroller operations,

such as the SLEEP or IDLE Mode function or Watchdog Timer. The reset flags are shown in the table:

PDF

RESET Conditions

Power-on reset

RES or LVR reset during NORMAL or SLOW Mode operation

WDT time-out reset during NORMAL or SLOW Mode operation

WDT time-out reset during IDLE or SLEEP Mode operation

Note:

²u² stands for unchanged

The following table indicates the way in which the various components of the microcontroller are af-

fected after a power-on reset occurs.

Item

Condition After RESET

Program Counter

Reset to zero

Interrupts

All interrupts will be disabled

WDT

Clear after reset, WDT begins counting

Timer/Event Counter

Timer Counter will be turned off

Input/Output Ports

I/O ports will be setup as inputs

Stack Pointer

Stack Pointer will point to the top of the stack

Rev. 1.20

September 15, 2011

HT45F23/HT45F43

8-Bit Flash MCU with Op Amps & Comparators

t S S T

W D T T i m e - o u t

I n t e r n a l R e s e t

WDT Time-out Reset during Idle/Sleep Timing Chart

t R S T D + t S S T

W D T T i m e - o u t

I n t e r n a l R e s e t

Note: tRSTD is power-on delay, typical time=100ms

WDT Time-out Reset during Normal Operation Timing Chart

HT45F43 Datasheet(PDF) 54 Page - Holtek Semiconductor Inc

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