HT67F60 datasheet(50/242 Pages) HOLTEK

50 / 242 page

Rev. 1.50

March 06 , 2012

Rev. 1.50

March 06 , 2012

HT67F30/HT67F40/HT67F50/HT67F60

TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPRO

●

EEC Register

Bit

Name

—

WREN

RDEN

R/W

—

R/W

POR

—

Bit 7 ~ 4

Unimplemented, read as “0”

Bit 3

WREN: Data EEPROM Write Enable

0: Disable

1: Enable

This is the Data EEPROM Write Enable Bit which must be set high before Data

EEPROM write operations are carried out. Clearing this bit to zero will inhibit Data

EEPROM write operations.

Bit 2

WR: EEPROM Write Control

0: Write cycle has finished

1: Activate a write cycle

This is the Data EEPROM Write Control Bit and when set high by the application

program will activate a write cycle. This bit will be automatically reset to zero by the

hardware after the write cycle has finished. Setting this bit high will have no effect if

the WREN has not first been set high.

Bit 1

RDEN: Data EEPROM Read Enable

0: Disable

1: Enablez

This is the Data EEPROM Read Enable Bit which must be set high before Data

EEPROM read operations are carried out. Clearing this bit to zero will inhibit Data

EEPROM read operations.

Bit 0

RD: EEPROM Read Control

0: Read cycle has finished

1: Activate a read cycle

This is the Data EEPROM Read Control Bit and when set high by the application

program will activate a read cycle. This bit will be automatically reset to zero by the

hardware after the read cycle has finished. Setting this bit high will have no effect if

the RDEN has not first been set high.

Note: The WREN, WR, RDEN and RD can not be set to “1” at the same time in one instruction. The

WR and RD can not be set to “1” at the same time.

HT67F60 Datasheet(PDF) 50 Page - Holtek Semiconductor Inc

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