HT67F60 datasheet(193/242 Pages) HOLTEK

193 / 242 page

HT67F30/HT67F40/HT67F50/HT67F60

TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPROM

Rev. 1.50

192

March 06 , 2012

Rev. 1.50

193

March 06 , 2012

Interrupt Operation

When the conditions for an interrupt event occur, such as a TM Comparator P, Comparator A or

Comparator B match or A/D conversion completion etc, the relevant interrupt request flag will be

set. Whether the request flag actually generates a program jump to the relevant interrupt vector is

determined by the condition of the interrupt enable bit. If the enable bit is set high then the program

will jump to its relevant vector; if the enable bit is zero then although the interrupt request flag is set

an actual interrupt will not be generated and the program will not jump to the relevant interrupt

vector. The global interrupt enable bit, if cleared to zero, will disable all interrupts.

When an interrupt is generated, the Program Counter, which stores the address of the next instruction

to be executed, will be transferred onto the stack. The Program Counter will then be loaded with a

new address which will be the value of the corresponding interrupt vector. The microcontroller will

then fetch its next instruction from this interrupt vector. The instruction at this vector will usually be

a “JMP” which will jump to another section of program which is known as the interrupt service

routine. Here is located the code to control the appropriate interrupt. The interrupt service routine

must be terminated with a "RETI" , which retrieves the original Program Counter address from the

stack and allows the microcontroller to continue with normal execution at the point where the

interrupt occurred.

The various interrupt enable bits, together with their associated request flags, are shown in the

accompanying diagrams with their order of priority. Some interrupt sources have their own

individual vector while others share the same multi-function interrupt vector. Once an interrupt

subroutine is serviced, all the other interrupts will be blocked, as the global interrupt enable bit, EMI

bit will be cleared automatically. This will prevent any further interrupt nesting from occurring.

However, if other interrupt requests occur during this interval, although the interrupt will not be

immediately serviced, the request flag will still be recorded.

If an interrupt requires immediate servicing while the program is already in another interrupt service

routine, the EMI bit should be set after entering the routine, to allow interrupt nesting. If the stack is

full, the interrupt request will not be acknowledged, even if the related interrupt is enabled, until the

Stack Pointer is decremented. If immediate service is desired, the stack must be prevented from

becoming full. In case of simultaneous requests, the accompanying diagram shows the priority that

is applied. All of the interrupt request flags when set will wake-up the device if it is in SLEEP or

IDLE Mode, however to prevent a wake-up from occurring the corresponding flag should be set

before the device is in SLEEP or IDLE Mode.

HT67F60 Datasheet(PDF) 193 Page - Holtek Semiconductor Inc