HT67F60 datasheet(203/242 Pages) HOLTEK

203 / 242 page

HT67F30/HT67F40/HT67F50/HT67F60

TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPROM

Rev. 1.50

202

March 06 , 2012

Rev. 1.50

203

March 06 , 2012

Power Down Mode and Wake-up

Entering the IDLE or SLEEP Mode

There is only one way for the device to enter the SLEEP or IDLE Mode and that is to execute the

"HALT" instruction in the application program. When this instruction is executed, the following will

occur:

● The system clock will be stopped and the application program will stop at the "HALT" instruction.

● The Data Memory contents and registers will maintain their present condition.

● The WDT will be cleared and resume counting if the WDT clock source is selected to come from

the fSUB clock source and the WDT is enabled. The WDT will stop if its clock source originates

from the system clock.

● The I/O ports will maintain their present condition.

● In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO,

will be cleared.

Standby Current Considerations

As the main reason for entering the SLEEP or IDLE Mode is to keep the current consumption of the

device to as low a value as possible, perhaps only in the order of several micro-amps, there are other

considerations which must also be taken into account by the circuit designer if the power

consumption is to be minimised. Special attention must be made to the I/O pins on the device. All

high-impedance input pins must be connected to either a fixed high or low level as any floating input

pins could create internal oscillations and result in increased current consumption. This also applies

to devices which have different package types, as there may be unbonbed pins. These must either be

setup as outputs or if setup as inputs must have pull-high resistors connected. Care must also be

taken with the loads, which are connected to I/O pins, which are setup as outputs. These should be

placed in a condition in which minimum current is drawn or connected only to external circuits that

do not draw current, such as other CMOS inputs. Also note that additional standby current will also

be required if the configuration options have enabled the LIRC oscillator.

Wake-up

After the system enters the SLEEP or IDLE Mode, it can be woken up from one of various sources

listed as follows:

● An external reset

● An external falling edge on Port A

● A system interrupt

● A WDT overflow

If the system is woken up by an external reset, the device will experience a full system reset,

however, if the device is woken up by a WDT overflow, a Watchdog Timer reset will be initiated.

Although both of these wake-up methods will initiate a reset operation, the actual source of the

wake-up can be determined by examining the TO and PDF flags. The PDF flag is cleared by a

system power-up or executing the clear Watchdog Timer instructions and is set when executing the

"HALT instruction. The TO flag is set if a WDT time-out occurs, and causes a wake-up that only

resets the Program Counter and Stack Pointer, the other flags remain in their original status.

Each pin on Port A can be setup using the PAWU register to permit a negative transition on the pin

to wake-up the system. When a Port A pin wake-up occurs, the program will resume execution at the

instruction following the "HALT" instruction.

HT67F60 Datasheet(PDF) 203 Page - Holtek Semiconductor Inc

HT67F60 Datasheet(HTML) 203 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL