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PA5026P Datasheet(PDF) 6 Page - Protek Devices |
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PA5026P Datasheet(HTML) 6 Page - Protek Devices |
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6 / 10 page ![]() PA5026 16-Bit Constant Current LED Sink Driver ANALOG PRODUCTS DIVISION 561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715. 6 www.protekanalog.com Not for use in any life support systems. 95180. Rev.2. 09/09 TEST CIRCUIT Test conditions: for above figure Tamb=25 C,VDD=VIH=3.3V and 5V,VOUT=O.7V,VIL=OV,REXT=49OΩ,VL=3.OV,RL=6OΩ,CL=IO.5pF SWITCHING CHARACTERISTICS Characteristic Symbol Condition Min. Typ. Max. Unit CLK - OUTn tpLH1 - 100 150 ns LE - OUTn tpLH2 - 100 150 ns OE - OUTn tpLH3 - 50 150 ns Propagation Delay Time (“L” to “H”) CLK - SDO tpL H 15 20 - ns CLK - OUTn tpHL1 - 50 100 ns LE - OUTn tpHL2 - 50 100 ns OE - OUTn tpHL3 - 20 100 ns Propagation Delay Time (“H” to “L”) CLK - SDO tpHL 15 20 - ns CLK tw(CLK) 20 - - ns LE tw(L) 20 - - ns Pulse Width OE tw(OE) 200 - - ns Hold Time for LE th(L) 5 - - ns Setup Time for LE tsu(L) 5 - - ns Hold Time for SDI th(D) 10 - - ns Setup Time for SDI tsu( D) VDD=5.0 V VDS=0.8 V VIH=VDD VIL=GND Rext=300 Ω VL=4.0 V RL=52 Ω CL=10 pF 5 - - ns Clock Frequency FCLK Cascade Operation - - 25.0 MHz Maximum CLK Rise Time tr** - - 500 ns Maximum CLK Fall Time tf** - - 500 ns Output Rise Time of Vout (turn off) tor - 70 200 ns PA5026 VIL+VIH OE CLK SW- MATRIX 21 3 4 2 23 24 22 20 5 LE SDI R-EXT GND 1 SDO OUT15 OUT0 VDD RL RL CL CL VL CL |
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