AFS090 datasheet(317/334 Pages) MICROSEMI

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5 -1

5 – Datasheet Information

List of Changes

The following table lists critical changes that were made in each revision of the Fusion datasheet.

Revision

Changes

Page

Revision 2

(March 2012)

The phrase "without debug" was removed from the "Soft ARM Cortex-M1 Fusion

Devices (M1)" section (SAR 21390).

The "In-System Programming (ISP) and Security" section, "Security" section, "Flash

Advantages" section, and "Security" section were revised to clarify that although no

existing security measures can give an absolute guarantee, Microsemi FPGAs

implement the best security available in the industry (SAR 34721).

I, 1-2,

2-229

The Y security option and Licensed DPA Logo was added to the "Product Ordering

Codes" section. The trademarked Licensed DPA Logo identifies that a product is

covered by a DPA counter-measures license from Cryptography Research (SAR

32151).

III

The "Specifying I/O States During Programming" section is new (SAR 34693).

1-8

The following information was added before Figure 2-17 • XTLOSC Macro:

In the case where the Crystal Oscillator block is not used, the XTAL1 pin should be

connected to GND and the XTAL2 pin should be left floating (SAR 24119).

2-21

Table 2-12 • Fusion CCC/PLL Specification was updated. A note was added

indicating that when the CCC/PLL core is generated by Microsemi core generator

software, not all delay values of the specified delay increments are available (SAR

34814).

2-30

A note was added to Figure 2-27 • Real-Time Counter System (not all the signals are

shown for the AB macro) stating that the user is only required to instantiate the

VRPSM macro if the user wishes to specify PUPO behavior of the voltage regulator

to be different from the default, or employ user logic to shut the voltage regulator off

(SAR 21773).

2-33

VPUMP was incorrectly represented as VPP in several places. This was corrected to

VPUMP in the "Standby and Sleep Mode Circuit Implementation" section and

Table 3-8 • AFS1500 Quiescent Supply Current Characteristics through Table 3-11 •

AFS090 Quiescent Supply Current Characteristics (21963).

2-34, 3-10

Additional information was added to the Flash Memory Block "Write Operation"

section, including an explanation of the fact that a copy-page operation takes no less

than 55 cycles (SAR 26338).

2-47

The "FlashROM" section was revised to refer to Figure 2-46 • FlashROM Timing

Diagram and Table 2-26 • FlashROM Access Time rather than stating 20 MHz as the

maximum FlashROM access clock and 10 ns as the time interval for D0 to become

valid or invalid (SAR 22105).

2-56, 2-57

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