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C511 Datasheet(PDF) 16 Page - Siemens Semiconductor Group |
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C511 Datasheet(HTML) 16 Page - Siemens Semiconductor Group |
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16 / 43 page ![]() Semiconductor Group 16 C511 / C513 CPU The C511/C513 are efficient both as a controller and as an arithmetic processor. It has extensive facilities for binary and BCD arithmetic and for bit-handling capabilities. Efficient use of program memory results from an instruction set consisting of 44 % one-byte, 41 % two-byte, and 15 % three- byte instructions. With a 12 MHz crystal, 58 % of the instructions execute in 1 µs. Special Function Register PSW (Address D0H) Reset Value : 00H Bit Function CY Carry Flag AC Auxiliary Carry Flag (for BCD operations) F0 General Purpose Flag RS1 RS0 00 01 10 11 Register Bank select control bits Bank 0 selected, data address 00H-07H Bank 1 selected, data address 08H-0FH Bank 2 selected, data address 10H-17H Bank 3 selected, data address 18H-1FH OV Overflow Flag F1 General Purpose Flag P Parity Flag Set/cleared by hardware each instruction cycle to indicate an odd/even number of "one" bits in the accumulator, i.e. even parity. CY AC F0 RS1 D0H PSW Bit No. 76543210 MSB LSB RS0 OV F1 P |
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