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TPS40422 Datasheet(PDF) 2 Page - Texas Instruments |
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TPS40422 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 54 page ![]() TPS40422 SMBALRT BP6 BPEXT VDD AGND 24 25 6 HDRV1 BOOT1 SW1 LDRV1 PGND CS1P CS1N GSNS1 DIFFO1 FB1 COMP1 TSNS1 VSNS1 29 30 28 27 26 34 35 37 38 39 2 3 36 V OUT1 HDRV2 BOOT2 SW2 LDRV2 CS2P CS2N GSNS2 FB2 COMP2 TSNS2 VSNS2 21 20 22 23 18 17 15 14 8 7 16 V OUT2 32 9 BP3 ADDR1 ADDR0 CNTL2 PG2 RT 10 1 19 5 12 11 CLK DATA CNTL1 PG1 SYNC 13 40 33 4 31 V IN SMBALRT CLK DATA CNTL1 PG1 SYNC CNTL2 PG2 UDG-11278 TPS40422 SLUSAQ4A – OCTOBER 2011 – REVISED DECEMBER 2011 www.ti.com SIMPLIFIED APPLICATION These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION(1)(2) TEMPERATUREE OUTPUT ORDERABLE DEVICE PACKAGE PINS MINIMUM QUANTITY RANGE SUPPLY NUMBER Tape and Reel 3000 TPS40422RHAR –40°C to 125°C QFN 40 Tube 250 TPS40422RHAT (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. 2 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS40422 |
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