Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered

MAX5813/MAX5814/MAX5815

 Maxim Integrated Products 14

Detailed Description

The MAX5813/MAX5814/MAX5815 are 4-channel, low-

power, 8-/10-/12-bit buffered voltage-output DACs. The

2.7V to 5.5V wide supply voltage range and low-power

consumption accommodates most low-power and low-

voltage applications. The devices present a 100kI load

to the external reference. The internal output buffers

allow rail-to-rail operation. An internal voltage reference

is available with software selectable options of 2.048V,

compatible interface. The MAX5813/MAX5814/MAX5815

include a serial-in/parallel-out shift register, internal

CODE and DAC registers, a power-on-reset (POR) cir-

cuit to initialize the DAC outputs to code zero, and con-

trol logic. CLR is available to asynchronously clear the

device independent of the serial interface.

DAC Outputs (OUT_)

The MAX5813/MAX5814/MAX5815 include internal buf-

fers on all DAC outputs. The internal output buffers

provide improved load regulation for the DAC outputs.

The output buffers slew at 1V/Fs (typ) and drive up to

2kI in parallel with 500pF. The analog supply voltage

no-load conditions, the output buffers drive from GND to

GND, the output buffers drive from GND to within 200mV

The DAC ideal output voltage is defined by:

OUT

REF

N

D

V

V

2

=

×

reference voltage, N = resolution.

Internal Register Structure

The user interface is separated from the DAC logic to

minimize digital feedthrough. Within the serial interface

is an input shift register, the contents of which can be

routed to control registers, individual, or multiple DACs

as determined by the user command.

Within each DAC channel there is a CODE register

followed by a DAC latch register (see the Detailed

Functional Diagram). The contents of the CODE register

hold pending DAC output settings which can later be

loaded into the DAC registers. The CODE register can be

updated using both CODE and CODE_LOAD user com-

mands. The contents of the DAC register hold the current

DAC output settings. The DAC register can be updated

directly from the serial interface using the CODE_LOAD

commands or can upload the current contents of the

CODE register using LOAD commands or the LDAC

hardware pin.

The contents of both CODE and DAC registers are main-

tained during power-down states, so that when the DACs

are powered on, they return to their previously stored

output settings. Any CODE or LOAD commands issued

during power-down states continue to update the register

contents. SW_CLEAR and SW_RESET commands reset

the contents of all CODE and DAC registers to their zero-

scale defaults.

Internal Reference

The MAX5813/MAX5814/MAX5815 include an internal

precision voltage reference that is software selectable

to be 2.048V, 2.500V, or 4.096V. When an internal refer-

ence is selected, that voltage is available on the REF pin

for other external circuitry (see Figure 9) and can drive

a 25kI load.

External Reference

The external reference input has a typical input

impedance of 100kI and accepts an input voltage

supply between REF and GND to apply an exter-

nal reference. The MAX5813/MAX5814/MAX5815

power up and reset to external reference mode. Visit

available external voltage-reference devices.

Load DAC (LDAC) Input

The MAX5813/MAX5814/MAX5815 feature an active-

low LDAC logic input that allows the outputs to update

high during normal operation when the device is con-

trolled only through the serial interface. Drive LDAC low

to simultaneously update the DAC outputs with data

from the CODE registers. Holding LDAC low causes the

DAC registers to become transparent and CODE data is

passed through to the DAC registers immediately updat-

ing the DAC outputs. A software CONFIG command can

be used to configure the LDAC operation of each DAC

independently.