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DM9106 Datasheet(PDF) 30 Page - Davicom Semiconductor, Inc. |
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DM9106 Datasheet(HTML) 30 Page - Davicom Semiconductor, Inc. |
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30 / 92 page ![]() DM9106 3-port switch with PCI Interface 30 Preliminary datasheet DM9106-DS-P01 July 9, 2009 4 IAFM 0,RO Inverse Address Filtering Mode It is set to indicate the DM9106 operate in a Inverse Filtering Mode. This is a only bit and mapped from the setup frame together with CR6<2>, CR6<0> setting. That is it is valid only during perfect filtering mode. 3 PBF 0,RW Pass Bad Frame When set, the DM9106 is indicated to receive the bad frames including runt packets, truncated frames caused by the FIFO overflow. The bad frame also has to pass the address filtering if the DM9106 is not set in promiscuous mode. 2 HOFM 0,RO Hash-only Filter Mode This is a read-only bit and mapped from the set-up frame together with bit4,0 of CR6.It is set to indicate the DM9106 operate in a Hash-only Filtering Mode. 1 RXRC 0,RW Receive Start/Stop Command When set, the receive process will begin by fetching the receive descriptor for available buffer to store the new-coming packet (placed in the running state). If the fetched descriptor is owned by the host (no descriptor is owned by the DM9106), the receive process will enter the suspend state and receive buffer unavailable CR5<7> sets. Otherwise it runs to wait for the packet’s income. When reset, the receive process is placed in the stopped state after completing the reception of the current frame. 0 HPFM 0,RO Hash/Perfect Filter Mode This is a read only bit and mapped from the setup frame together with CR6<4>, CR6<2>. When reset, the DM9106 does a perfect address filter of incoming frames according to the addresses specified in the setup frame. When set, the DM9106 does a imperfect address filtering for the incoming frame with a multicast address according to the hash table specified in the setup frame. The filtering mode (perfect/imperfect) for the frame with a physical address will depend on CR6<2>. |
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