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DM9332 Datasheet(PDF) 5 Page - Davicom Semiconductor, Inc. |
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DM9332 Datasheet(HTML) 5 Page - Davicom Semiconductor, Inc. |
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5 / 61 page ![]() DM9332 10/100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter Preliminary datasheet 5 DM9332-15-DS-P01 March 5, 2012 8.14 DAVICOM Specified Disconnect Counter Register (DISCR) – 17H ........................................................ 42 8.15 Power Saving Control Register (PSCR) – 1DH ......................................................................................... 42 9. FUNCTIONAL DESCRIPTION....................................................................................... 43 9.1 Serial Management Interface........................................................................................................................ 43 9.2 Switch function:............................................................................................................................................. 44 9.2.1 Address Learning ..................................................................................................................................... 44 9.2.2 Address Aging.......................................................................................................................................... 44 9.2.3 Packet Forwarding ................................................................................................................................... 44 9.2.4 Inter-Packet Gap (IPG) ............................................................................................................................ 44 9.2.5 Back-off Algorithm.................................................................................................................................... 44 9.2.6 Late Collision............................................................................................................................................ 44 9.2.7 Full Duplex Flow Control .......................................................................................................................... 44 9.2.8 Half Duplex Flow Control ......................................................................................................................... 44 9.2.9 Partition Mode .......................................................................................................................................... 45 9.2.10 Broadcast Storm Filtering....................................................................................................................... 45 9.2.11 Bandwidth Control.................................................................................................................................. 45 9.2.12 Port Monitoring Support ......................................................................................................................... 45 9.2.13 VLAN Support ........................................................................................................................................ 46 9.2.13.1 Port-Based VLAN................................................................................................................................ 46 9.2.13.2 802.1Q-Based VLAN........................................................................................................................... 46 9.2.13.3 Tag/Untag ........................................................................................................................................... 46 9.2.14 Priority Support ...................................................................................................................................... 47 9.2.14.1 Port-Based Priority .............................................................................................................................. 47 9.2.14.2 802.1p-Based Priority.......................................................................................................................... 47 9.2.14.3 DiffServ-Based Priority........................................................................................................................ 47 9.3 MII Interface.................................................................................................................................................... 48 9.3.1 MII data interface ..................................................................................................................................... 48 9.3.2 MII Serial Management ............................................................................................................................ 48 9.3.3 Serial Management Interface ................................................................................................................... 49 9.3.4 Management Interface - Read Frame Structure ...................................................................................... 49 |
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