LTC3869 datasheet(18/50 Pages) LINER

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LTC3839

3839fa

APPLICATIONS INFORMATION

Inductor Core Selection

Once the value for L is known, the type of inductor must

be selected. The two basic types are iron powder and fer-

rite. The iron powder types have a soft saturation curve

which means they do not saturate hard like ferrites do.

However, iron powder type inductors have higher core

losses. Ferrite designs have very low core loss and are

preferred at high switching frequencies, so design goals

can concentrate on copper loss and preventing saturation.

Core loss is independent of core size for a fixed inductor

value, but it is very dependent on inductance selected. As

inductance increases, core losses go down. Unfortunately,

increased inductance requires more turns of wire and

therefore copper losses will increase.

Ferrite core material saturates hard, which means that in-

ductance collapses abruptly when the peak design current

is exceeded. This results an abrupt increase in inductor

ripple current and consequent output voltage ripple. Do

not allow the core to saturate!

A variety of inductors designed for high current, low volt-

age applications are available from manufacturers such as

Sumida, Panasonic, Coiltronics, Coilcraft, Toko, Vishay,

Pulse and Würth.

Current Sense Pins

Inductor current is sensed through voltage between

SENSE+ and SENSE– pins, the inputs of the internal current

comparators. The input voltage range of the SENSE pins is

–0.5V to 5.5V. Care must be taken not to float these pins

during normal operation. The SENSE+ pins are quasi-high

impedance inputs. There is no bias current into a SENSE+

pin when its corresponding channel’s SENSE– pin ramps

up from below 1.1V and stays below 1.4V. But there is a

small (~1μA) current flowing into a SENSE+ pin when its

corresponding SENSE– pin ramps down from 1.4V and

stays above 1.1V. Such currents also exist on SENSE– pins.

But in addition, each SENSE– pin has an internal 500k

resistor to SGND. The resulted current (VOUT/500k) will

dominate the total current flowing into the SENSE– pins.

SENSE+ and SENSE– pin currents have to be taken into

account when designing either RSENSE or DCR inductor

current sensing.

Current Limit Programming

The current sense comparators’ maximum trip voltage

between SENSE+ and SENSE– (or “sense voltage”), when

ITH is clamped at its maximum 2.4V, is set by the voltage

applied to the VRNG pin and is given by:

VSENSE(MAX) = 0.05VRNG

The valley current mode control loop does not allow the

inductor current valley to exceed 0.05VRNG. Note that ITH

is close to 2.4V when in current limit.

An external resistive divider from INTVCC can be used to set

the voltage on a VRNG pin between 0.6V and 2V, resulting

in a maximum sense voltage between 30mV and 100mV.

Such wide voltage range allows for variety of applications.

The VRNG pin can also be tied to either SGND or INTVCC

to force internal defaults. When VRNG is tied to SGND, the

device has an equivalent VRNG of 0.6V. When the VRNG pin

is tied to INTVCC, the device has an equivalent VRNG of 2V.

Sufficient margin should be allowed to account for IC

and external component tolerances. The Electrical Char-

acteristics (EC) table gives the maximum valley current

sense threshold, VSENSE(MAX)1,2 , which is the guaranteed

specification over the operating junction temperature range

for either of the two channels of LTC3839. When designing

an application, the maximum value in the EC table should

always be used to assure that the maximum possible

current in a single channel does not exceed the rating of

the external components, such as power MOSFETs and

inductors, in a worse case fault condition.

To ensure a multiphase single-output application can deliver

its desired full load current, the minimum output current

capability of the application can be determined from the

lower limits of VSENSE(MAX). For LTC3839, this can be done

using either worst-case or statistical tolerancing. Worst-

case tolerancing is the most conservative and is calculated

from the minimum value of the single channel VSENSE(MAX)

in the EC table, multiplied by the number of phases (e.g.,

2x in a 2-phase application). Statistical tolerancing takes

into consideration the distribution of both current limit

channels to predict the effective statistical limits of the sum

of multiple channels’ VSENSE(MAX). Based on distributions

over temperature of the 2-channel-sum [VSENSE(MAX)1 +

VSENSE(MAX)2 ] from the characterization LTC3839, the

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