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LTC3839

3839fa

APPLICATIONS INFORMATION

If the bottom MOSFET could be turned off during the load-

release transient, the inductor current would flow through

the body diode of the bottom MOSFET, and the equation

can be modified to include the bottom MOSFET body

diode drop to become VL = –(VOUT + VBD). Obviously the

benefit increases as the output voltage gets lower, since

VBD would increase the sum significantly, compared to a

single VOUT only.

The load-release overshoot at VOUT causes the error ampli-

fier output, ITH, to drop quickly. ITH voltage is proportional

to the inductor current setpoint. A load transient will

result in a quick change of this load current setpoint, i.e.,

a negative spike of the first derivative of the ITH voltage.

The LTC3839 uses a detect transient (DTR) pin to monitor

the first derivative of the ITH voltage, and detect the load-

release transient. Referring to the Functional Diagram, the

DTR pin is the input of a DTR comparator, and the internal

reference voltage for the DTR comparator is half of INTVCC.

To use this pin for transient detection, ITH compensation

needs an additional RITH resistor tied to INTVCC, and con-

nects the junction point of ITH compensation components

CITH1, RITH1 and RITH2 to the DTR pin as shown in the

Functional Diagram. The DTR pin is now proportional to

the first derivative of the inductor current setpoint, through

the highpass filter of CITH1 and (RITH1//RITH2).

The two RITH resistors establish a voltage divider from

INTVCC to SGND, and bias the DC voltage on DTR pin (at

steady-state load or ITH voltage) slightly above half of

INTVCC. Compensation performance will be identical by

using the same CITH1 and make RITH1//RITH2 equal the

RITH as used in conventional single resistor OPTI-LOOP

compensation. This will also provide the R-C time constant

needed for the DTR duration. The DTR sensitivity can be

adjusted by the DC bias voltage difference between DTR

and half INTVCC. This difference could be set as low as

200mV, as long as the ITH ripple voltage with DC load

current does not trigger the DTR. Note the 5μA pull-up

current from the DTR pin will generate an additional offset

on top of the resistor divider itself, making the total dif-

ference between the DC bias voltage on the DTR pin and

half INTVCC:

VDTR(DC) – 0.5 • VINTVCC = [RITH1/(RITH1 + RITH2) – 0.5]

• 5.3V + 5μA • (RITH1//RITH2)

As illustrated in Figure 12, when load current suddenly

drops, VOUTovershoots,andITHdropsquickly.Thevoltage

on the DTR pin will also drop quickly, since it is coupled

to the ITH pin through a capacitor. If the load transient

is fast enough that the DTR voltage drops below half of

INTVCC, a load release event is detected. The bottom gate

(BG) will be turned off, so that the inductor current flows

through the body diode in the bottom MOSFET. This al-

lows the SW node to drop below PGND by a voltage of

a forward-conducted silicon diode. This creates a more

negative differential voltage (VSW – VOUT) across the

inductor, allowing the inductor current to drop at a faster

rate to zero, therefore creating less overshoot on VOUT.

Figure 12. Comparison of Detect Transient Load-Release (DTR) Feature Enabled and Disabled

5V/DIV

DTR

1V/DIV

10A/DIV

5V/DIV

ITH

1V/DIV

10A/DIV

5μs/DIV

DTR DETECTS LOAD

RELEASE, TURNS OFF BG

FOR FASTER INDUCTOR

CURRENT (IL) DECAY

VIN = 5V

VOUT = 0.6V

VIN = 5V

VOUT = 0.6V

(12a) DTR Enabled

5μs/DIV

3839 F12

(12b) DTR Disabled

BG TURNS BACK ON, INDUCTOR

CURRENT (IL) GOES NEGATIVE

BG REMAINS ON

DURING THE LOAD

RELEASE EVENT

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