LT4250 datasheet(19/34 Pages) LINER

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LTC4253/LTC4253A

425353afe

APPLICATIONS INFORMATION

TIMER commences charging CT (trace 4) while the analog

current limit loop maintains the fault current at 100mV/RS,

which in this case is 5A (trace 2). Note that the backplane

voltage (trace 1) sags under load. Timer pull-up is accel-

erated by VOUT. When CT reaches 4V, GATE turns off, the

PWRGD signals pull high, the load current drops to zero

and the backplane rings up to over 100V. The transient

associated with the GATE turn-off can be controlled with

a snubber to reduce ringing and a transient voltage sup-

pressor (such as Diodes Inc. SMAT70A) to clip off large

spikes. The choice of RC for the snubber is usually done

experimentally. The value of the snubber capacitor is usu-

ally chosen between 10 to 100 times the MOSFET COSS.

The value of the snubber resistor is typically between 3Ω

to 100Ω.

A low impedance short on one card may influence the

behavior of others sharing the same backplane. The ini-

tial glitch and backplane sag as seen in Figure 5 trace 1,

can rob charge from output capacitors on the adjacent

card. When the faulty card shuts down, current flows in

to refresh the capacitors. If LTC4253/LTC4253A are used

by the other cards, they respond by limiting the inrush

current to a value of VACL/RS. If CT is sized correctly, the

capacitors will recharge long before CT times out.

Figure 5. Output Short-Circuit Behavior of LTC4253

Sense

The SENSE pin is monitored by the circuit breaker (CB)

comparator, the analog current limit (ACL) amplifier, and

the fast current limit (FCL) comparator. Each of these three

measures the potential of SENSE relative to VEE. When

SENSE exceeds 50mV, the CB comparator activates the

200μA TIMER pull-up. At 100mV (60mV for the LTC4253A)

the ACL amplifier servos the MOSFET current, and at

200mV the FCL comparator abruptly pulls GATE low in

an attempt to bring the MOSFET current under control. If

any of these conditions persists long enough for TIMER to

charge CT to 4V (see Equation 3), the LTC4253/LTC4253A

shut down and pull GATE low.

If the SENSE pin encounters a voltage greater than VACL,

the ACL amplifier will servo GATE downwards in an attempt

to control the MOSFET current. Since GATE overdrives the

MOSFET in normal operation, the ACL amplifier needs time

to discharge GATE to the threshold of the MOSFET. For a

mild overload the ACL amplifier can control the MOSFET

current, but in the event of a severe overload the current

may overshoot. At SENSE = 200mV the FCL comparator

takes over, quickly discharging the GATE pin to near VEE

potential. FCL then releases, and the ACL amplifier takes

over. All the while TIMER is running. The effect of FCL is

to add a nonlinear response to the control loop in favor

of reducing MOSFET current.

Owing to inductive effects in the system, FCL typically

overcorrects the current limit loop, and GATE undershoots.

A zero in the loop (resistor RC in series with the gate

capacitor) helps the ACL amplifier to recover.

SHORT-CIRCUIT OPERATION

Circuit behavior arising from a load side low impedance

short is shown in Figure 5. Initially the current overshoots

the analog current limit level of VSENSE = 200mV (trace 2)

as the GATE pin works to bring VGS under control (trace 3).

The overshoot glitches the backplane in the negative direc-

tion and when the current is reduced to 100mV/RS, the

backplane responds by glitching in the positive direction.

GATE

0.5ms

10V

SENSE

0.5ms

200mV

–48RTN

0.5ms

50V

TIMER

0.5ms

4253 F05

SUPPLY RING OWING

TO CURRENT OVERSHOOT

SUPPLY RING OWING

TO MOSFET TURN-OFF

ONSET OF OUTPUT

SHORT-CIRCUIT

FAST CURRENT

LIMIT

CTIMER RAMP

LATCH OFF

TRACE 1

TRACE 2

TRACE 3

TRACE 4

ANALOG

CURRENT LIMIT

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