864075 datasheet(21/43 Pages) INTEL

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PRELIMINARY

8XC196NU COMMERCIAL CHMOS 16-BIT MICROCONTROLLER

T1CLK

Timer 1 External Clock

External clock for timer 1. Timer 1 increments (or decrements) on both rising

and falling edges of T1CLK. Also used in conjunction with T1DIR for quadrature

counting mode.

and

External clock for the serial I/O baud-rate generator input (program selectable).

T1CLK is multiplexed with P1.4.

T2CLK

Timer 2 External Clock

External clock for timer 2. Timer 2 increments (or decrements) on both rising

and falling edges of T2CLK. Also used in conjunction with T2DIR for quadrature

counting mode.

T2CLK is multiplexed with P1.6.

T1DIR

Timer 1 External Direction

External direction (up/down) for timer 1. Timer 1 increments when T1DIR is high

and decrements when it is low. Also used in conjunction with T1CLK for quadra-

ture counting mode.

T1DIR is multiplexed with P1.5.

T2DIR

Timer 2 External Direction

External direction (up/down) for timer 2. Timer 2 increments when T2DIR is high

and decrements when it is low. Also used in conjunction with T2CLK for quadra-

ture counting mode.

T2DIR is multiplexed with P1.7.

TXD

Transmit Serial Data

In serial I/O modes 1, 2, and 3, TXD transmits serial port output data. In mode

0, it is the serial clock output.

TXD is multiplexed with P2.0.

PWR

Digital Supply Voltage

Connect each V

CC pin to the digital supply voltage.

GND

Digital Circuit Ground

Connect each V

SS pin to ground through the lowest possible impedance path.

WR#

Write†

This active-low output indicates that an external write is occurring. This signal is

asserted only during external memory writes.

WR# is multiplexed with WRL#.

† The chip configuration register 0 (CCR0) determines whether this pin func-

tions as WR# or WRL#. CCR0.2 = 1 selects WR#; CCR0.2 = 0 selects WRL#.

WRH#

Write High†

During 16-bit bus cycles, this active-low output signal is asserted for high-byte

writes and word writes to external memory. During 8-bit bus cycles, WRH# is

asserted for all write operations.

WRH# is multiplexed with BHE#.

† The chip configuration register 0 (CCR0) determines whether this pin func-

tions as BHE# or WRH#. CCR0.2 = 1 selects BHE#; CCR0.2 = 0 selects

WRH#.

Table 8. Signal Descriptions (Continued)

Name

Type

Description

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