MPT57604

192/200-OUTPUT TFT GATE DRIVER

SGLS109 - JANUARY 2000

3

POST OFFICE BOX 655303

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

CPV

I

Vertical shift clock input

The shift register’s shift clock. Data are shifted in sync with the rising edge of this pin.

OE1

OE2

OE3

I

Output enable pins

The liquid-crystal control output is held low by setting pins OE1, 2, and 3 High. However, the shift

registers are not cleared. OE is async with CPV.

Enable control target pin:

200-output mode

OE1: OUT1, OUT4, OUT7...OUT196, OUT199

OE2: OUT2, OUT5, OUT8...OUT197, OUT200

OE3: OUT3, OUT6, OUT9...OUT198

192-output mode

OE1: OUT1, OUT4, OUT7...OUT190

OE2: OUT2, OUT5, OUT8...OUT191

OE3: OUT3, OUT6, OUT9...OUT192

These combinations are generally as above, regardless of the L/R polarity.

L/R

I

Shift direction switching pin

This pin is used to switch the data’s shift direction.

L/R = L:

Mode = VEE

STV1

← OUT1 ← OUT2...OUT199 ← OUT200 ← STV2

Mode = VDL

STV1

← OUT1 ← OUT2...OUT191 ← OUT192 ← STV2

L/R = H:

Mode = VEE

STV1

→ OUT1 → OUT2...OUT199 → OUT200 → STV2

Mode = VDL

STV1

→ OUT1 → OUT2...OUT191 → OUT192 → STV2

Mode

I

Mode switching input pin

Sets either the 200-output mode or the 192-output mode.

Connects to VEE in the 200-output mode.

Connects to VDL in the 192-output mode.

For details regarding the output pins, refer to pins OUT1-OUT200.

Furthermore, the mode pin is connected on the TCP.

STV1

STV2

I/O

Shift data I/O pins

These pins are used to input/output data to/from a shift register. During input, data are captured in sync

with the leading edge of CPV. During output, data are output in sync with its trailing edge.

L/R = L:

STV1 is the next-stage data output pin, and STV2 is the shift data input pin.

L/R = H:

STV1 is the shift data input pin, and STV2 is the next-stage data output pin.