MPT57604

192/200-OUTPUT TFT GATE DRIVER

SGLS109 - JANUARY 2000

5

POST OFFICE BOX 655303

detailed description

Liquid-Crystal Control Output Voltage

The MPT57604 enables negative-voltage output for the liquid-crystal control output.

V(COM)

VDD

VSS

VEE = VL

Logic Input

Out

Figure 1. Liquid-Crystal Control Output Voltage

The next-stage data output pins (STV1, STV2) output the next level:

Details of Operation

The liquid-crystal control outputs (OUT1-200) output either a selective signal (H) or a non-selective signal (L),

depending on the input signals (STV1 and STV2, CPV, OE1, OE2, OE3).

A right data shift (OUT1

→ OUT200) or a left data shift (OUT200 → OUT1) can be selected by means of the

shift direction switching pin (L/R).

When the L/R pin is H, the vertical shift data (STV1) are captured at the leading edge of the shift clock (CPV),

after which they are output to the liquid-crystal control output OUT1. Furthermore, the OUT1 output data are

shifted to OUT2 at the leading edge of the next CPV, and the data newly fetched from STV1 are output to OUT1.

In this manner, they are shifted successively in sync with the leading edge of CPV, and the OUT200 data are

output to STV2 in sync with the trailing edge of CPV.

When the L/R pin is L, the vertical shift data (STV2) are captured at the leading edge of the shift clock (CPV),

after which they are output to the liquid-crystal control output OUT200. Furthermore, the OUT200 output data

are shifted to OUT199 at the leading edge of the next CPV, and the data newly fetched from STV2 are output

to OUT200. In this manner, they are shifted successively in sync with the leading edge of CPV, and the OUT1

data are output to STV1 in sync with the trailing edge of CPV.

Also, while OE1, OE2, and OE3 are H, the corresponding liquid-crystal control outputs (OE1: OUT1, 4, 7,...;

OE2: OUT2, 5, 8,...; OE3: OUT 3, 6, 9,...) all become non-selective signals (L). In order to hold the internal data,

however, the previous state is restored by again setting to L.