TFB2002BI

FUTUREBUS+ I/O CONTROLLER

SLLS182 – AUGUST 1994

3

POST OFFICE BOX 655303

Terminal Functions

host interface

TERMINAL

I/O

FROM/TO

DESCRIPTION

NAME

NO.

I/O

FROM/TO

DESCRIPTION

BSTAT< 1:0 >*

206

I/O

Host interface

Host-interface status:

207

HH

Normal

HL

Reserved

LH

LL

Bus error

Bk ff/ t

LL

Backoff/retry

BSTRDY*

43

I/O

Host interface

Burst ready

CLK

172

I

Host interface

Clock input. CLK is the processor clock for synchronous transactions on the

host side. Up to 25 MHz is recommended.

DL < 1:0 >

23, 25

I/O

Host interface

Host-interface data length:

LL

64 bytes

LH

y

32 bytes

HL

HH

16 bytes

8b t

HH

8 bytes

DSACK< 1:0 >*

26

27

I/O

Host interface

Data acknowledge:

Single mode (TBST* = high):

Burst mode (TBST* = low):

LL

Complete cycle,

LL

Low speed, 32-bit burst capable

LL

Com lete cycle,

data bus port 32

LL

Low s eed, 32 bit burst ca able

LH

Reserved

LH

High speed, 32-bit burst capable

HL

Reserved

HL

g,

Low speed, 64-bit burst capable

HH

Insert wait state

HH

High speed, 64-bit burst capable

DW64*

192

I/O

Host interface

Host-interface data width of 64 (burst mode only)

HAS*

14

I/O

Host interface

Host-interface address strobe

HBG*

184

I

Host interface

Host-interface grant input

HBGACK*

183

I/O

(open collector)

Host interface

Host-interface grant acknowledge

HBR*

185

O

(open collector)

Host interface

Host-interface request output

HDS*

191

I/O

Host interface

Host-interface data strobe

HIP*

15

I/O

Host interface

Host-interface transaction in progress

IGNORE*

179

I

Host interface

Ignore the current host transaction input. IGNORE* is supplied by the host-

memory decoder when an access to private memory occurs. IGNORE* is

optional and should be tied high if it is not used.

INT*

180

O

(open collector)

Host interface

Host interrupt output. When an enabled interrupt condition occurs, INT* is driven

low. Interrupts are cleared by writing a one to the appropriate bit in the interrupt

register. The interrupt goes high during the write cycle to the interrupt register

even if another interrupt is pending. Also used from FB+ CM < 2:0 > lines to a

mastered HIF locked operation. These terminals are used as inputs when the

IOC is a host-interface slave/FB+ master.

LK*

196

I/O

Host interface

Host cycle is locked (indivisible)

LKFLD0,

LKFLD1,

LKFLD2

187

188

189

I/O

Host interface

Locked-command bits passed from the host interface to FB+ or from FB+ to the

host interface via the CM < 2:0 > lines during a mastered FB+ data phase in a

locked operation. Also used from FB+ CM < 2:0 > lines to a mastered HIF locked

operation. These terminals are used as inputs when the IOC is a host interface

slave/FB+ master.