TFB2022AI

FUTUREBUS+ DATA PATH UNIT

SLLS183 − AUGUST 1994

3

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Terminal Functions

host interface

TERMINAL

I/O

FROM/TO

DESCRIPTION

NAME

NO.

I/O

FROM/TO

DESCRIPTION

BSTAT<1:0>*

14, 13

I

Host interface

Host-interface status:

HH

Normal

HL

Reserved

LH

Bus error

LL

Backoff/retry

BSTRDY*

131

I

Host interface

Burst ready

CLK

29

I

Host interface

Clock input. CLK is the processor clock for synchronous transactions on the host side.

Up to 25 MHz is recommended.

DL<1:0>

147, 146

I

Host interface

Host-interface data length:

LL

64 bytes

LH

32 bytes

HL

16 bytes

HH

8 bytes

DSACK<1:0>*

145, 144

I

Host interface

Data acknowledge:

Single mode (TBST* = high):

Burst mode (TBST* = low):

LL

Complete cycle,

LL

Low speed, 32-bit burst capable

data bus port 32

LH

Reserved

LH

High speed, 32-bit burst capable

HL

Reserved

HL

Low speed, 64-bit burst capable

HH

Insert wait state

HH

High speed, 64-bit burst capable

HA<31:0>

205 − 204,

202 − 197,

195 − 190,

188 − 183,

181 − 176,

174 − 169

I/O

Host interface

Host-interface address or upper quadlet of data

HAP<3:0>

209−206

I/O

Host interface

Extended host-interface address or parity for upper quadlet of host interface data

HAS*

156

I

Host interface

Host-interface address strobe

HD<31:0>

10 − 6, 4 − 2,

240 − 239,

237 − 232,

229 − 225,

223 − 221,

219 − 218,

216 − 211

I/O

Host interface

Lower quadlet of host-interface data

HDP<3:0>

11, 1, 230,

220

I/O

Host interface

Parity for lower quadlet of host-interface data

HIP*

155

I

Host interface

Host-interface transaction in progress

TR/W*

148

I

Host interface

Host-interface read or write

TSIZE<1:0>

167, 166

I/O

Host interface

Host-interface transaction size:

LL

Word (32 bits or greater)

LH

Byte (8 bits)

HL

Half word (16 bits)

HH

Three bytes (24 bits)