TI380PCI

PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS

SPWS020 – AUGUST 1995

3

POST OFFICE BOX 1443

block diagram

TI380PCI can connect to up to four devices in a system: the PCI bus, the SIF bus, an optional serial EEPROM,

and an optional boot ROM. The major blocks of the TI380PCI include the PCI Interface (PCIIF ), SIF, and ROM

Interface (ROMIF ) as shown in Figure 3.

DB9 / UTP

AD31 – AD00

C/BE3 – C/BE0

DEVSEL

FRAME

GNT

IDSEL

INTA

IRDY

PAR

PCLK

RST

REQ

PERR

SERR

STOP

TRDY

PCI Interface

(PCIIF)

SADH0 – SADH7

SADL0 – SADL7

SDTACK

SBRLS

SBRQ

SHALT

SDBEN

SALE

SXAL

SOWN

SBCLK

SUDS

SLDS

SIRQ

SBGR

SBERR

SAS

SRESET

SRS0 – SRS1

SRSX

SCS

ROMA00 – ROMA07

ROMCS

Controls

Communication

Between

TI380PCI

and PCI Bus

System Interface

(SIF)

Controls

Communication

Between

TI380C2x and

the TI380PCI

ICT

ROM Interface

(ROMIF)

SRNW

ROMA08 – ROMA15

Burned-In

Address

Emulation

Interface

(BIF)

I2C Serial

EEPROM

Interface

(EIF)

MAX2

MAX0

MROMEN

MBCLK1

MADH00 –0 7

MBIAEN

Local Memory

Bus Snoop

EDIO

EDC

64-Byte FIFO

Figure 3. TI380PCI Block Diagram